base.hh revision 8229
12810SN/A/*
22810SN/A * Copyright (c) 2003-2005 The Regents of The University of Michigan
32810SN/A * All rights reserved.
42810SN/A *
52810SN/A * Redistribution and use in source and binary forms, with or without
62810SN/A * modification, are permitted provided that the following conditions are
72810SN/A * met: redistributions of source code must retain the above copyright
82810SN/A * notice, this list of conditions and the following disclaimer;
92810SN/A * redistributions in binary form must reproduce the above copyright
102810SN/A * notice, this list of conditions and the following disclaimer in the
112810SN/A * documentation and/or other materials provided with the distribution;
122810SN/A * neither the name of the copyright holders nor the names of its
132810SN/A * contributors may be used to endorse or promote products derived from
142810SN/A * this software without specific prior written permission.
152810SN/A *
162810SN/A * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
172810SN/A * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
182810SN/A * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
192810SN/A * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
202810SN/A * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
212810SN/A * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
222810SN/A * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
232810SN/A * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
242810SN/A * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
252810SN/A * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
262810SN/A * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
272810SN/A *
282810SN/A * Authors: Erik Hallnor
292810SN/A *          Ron Dreslinski
302810SN/A */
312810SN/A
322810SN/A/**
332810SN/A * @file
342810SN/A * Declaration of a common base class for cache tagstore objects.
352810SN/A */
362810SN/A
372810SN/A#ifndef __BASE_TAGS_HH__
382810SN/A#define __BASE_TAGS_HH__
392810SN/A
402810SN/A#include <string>
418229Snate@binkert.org
428229Snate@binkert.org#include "base/callback.hh"
432810SN/A#include "base/statistics.hh"
442810SN/A
452810SN/Aclass BaseCache;
462810SN/A
472810SN/A/**
482810SN/A * A common base class of Cache tagstore objects.
492810SN/A */
502810SN/Aclass BaseTags
512810SN/A{
522810SN/A  protected:
532810SN/A    /** Pointer to the parent cache. */
542810SN/A    BaseCache *cache;
552810SN/A
562810SN/A    /** Local copy of the parent cache name. Used for DPRINTF. */
572810SN/A    std::string objName;
582810SN/A
592810SN/A    /**
602810SN/A     * The number of tags that need to be touched to meet the warmup
612810SN/A     * percentage.
622810SN/A     */
632810SN/A    int warmupBound;
642810SN/A    /** Marked true when the cache is warmed up. */
652810SN/A    bool warmedUp;
662810SN/A
676978SLisa.Hsu@amd.com    /** the number of blocks in the cache */
686978SLisa.Hsu@amd.com    unsigned numBlocks;
696978SLisa.Hsu@amd.com
702810SN/A    // Statistics
712810SN/A    /**
722810SN/A     * @addtogroup CacheStatistics
732810SN/A     * @{
742810SN/A     */
752810SN/A
762810SN/A    /** Number of replacements of valid blocks per thread. */
775999Snate@binkert.org    Stats::Vector replacements;
782810SN/A    /** Per cycle average of the number of tags that hold valid data. */
795999Snate@binkert.org    Stats::Average tagsInUse;
802810SN/A
812810SN/A    /** The total number of references to a block before it is replaced. */
825999Snate@binkert.org    Stats::Scalar totalRefs;
832810SN/A
842810SN/A    /**
852810SN/A     * The number of reference counts sampled. This is different from
862810SN/A     * replacements because we sample all the valid blocks when the simulator
872810SN/A     * exits.
882810SN/A     */
895999Snate@binkert.org    Stats::Scalar sampledRefs;
902810SN/A
912810SN/A    /**
922810SN/A     * Average number of references to a block before is was replaced.
932810SN/A     * @todo This should change to an average stat once we have them.
942810SN/A     */
952810SN/A    Stats::Formula avgRefs;
962810SN/A
972810SN/A    /** The cycle that the warmup percentage was hit. */
985999Snate@binkert.org    Stats::Scalar warmupCycle;
996978SLisa.Hsu@amd.com
1006978SLisa.Hsu@amd.com    /** Average occupancy of each context/cpu using the cache */
1016978SLisa.Hsu@amd.com    Stats::AverageVector occupancies;
1026978SLisa.Hsu@amd.com
1036978SLisa.Hsu@amd.com    /** Average occ % of each context/cpu using the cache */
1046978SLisa.Hsu@amd.com    Stats::Formula avgOccs;
1056978SLisa.Hsu@amd.com
1062810SN/A    /**
1072810SN/A     * @}
1082810SN/A     */
1092810SN/A
1102810SN/A  public:
1112810SN/A
1122810SN/A    /**
1132810SN/A     * Destructor.
1142810SN/A     */
1152810SN/A    virtual ~BaseTags() {}
1162810SN/A
1172810SN/A    /**
1182810SN/A     * Set the parent cache back pointer. Also copies the cache name to
1192810SN/A     * objName.
1202810SN/A     * @param _cache Pointer to parent cache.
1212810SN/A     */
1222810SN/A    void setCache(BaseCache *_cache);
1232810SN/A
1242810SN/A    /**
1252810SN/A     * Return the parent cache name.
1262810SN/A     * @return the parent cache name.
1272810SN/A     */
1282810SN/A    const std::string &name() const
1292810SN/A    {
1302810SN/A        return objName;
1312810SN/A    }
1322810SN/A
1332810SN/A    /**
1342810SN/A     * Register local statistics.
1352810SN/A     * @param name The name to preceed each statistic name.
1362810SN/A     */
1372810SN/A    void regStats(const std::string &name);
1382810SN/A
1392810SN/A    /**
1402810SN/A     * Average in the reference count for valid blocks when the simulation
1412810SN/A     * exits.
1422810SN/A     */
1432810SN/A    virtual void cleanupRefs() {}
1447612SGene.Wu@arm.com
1457612SGene.Wu@arm.com    /**
1467612SGene.Wu@arm.com     *iterated through all blocks and clear all locks
1477612SGene.Wu@arm.com     *Needed to clear all lock tracking at once
1487612SGene.Wu@arm.com     */
1497612SGene.Wu@arm.com    virtual void clearLocks() {}
1502810SN/A};
1512810SN/A
1522810SN/Aclass BaseTagsCallback : public Callback
1532810SN/A{
1542810SN/A    BaseTags *tags;
1552810SN/A  public:
1562810SN/A    BaseTagsCallback(BaseTags *t) : tags(t) {}
1572810SN/A    virtual void process() { tags->cleanupRefs(); };
1582810SN/A};
1592810SN/A
1602810SN/A#endif //__BASE_TAGS_HH__
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