stride.hh revision 8229
12810SN/A/*
22810SN/A * Copyright (c) 2005 The Regents of The University of Michigan
32810SN/A * All rights reserved.
42810SN/A *
52810SN/A * Redistribution and use in source and binary forms, with or without
62810SN/A * modification, are permitted provided that the following conditions are
72810SN/A * met: redistributions of source code must retain the above copyright
82810SN/A * notice, this list of conditions and the following disclaimer;
92810SN/A * redistributions in binary form must reproduce the above copyright
102810SN/A * notice, this list of conditions and the following disclaimer in the
112810SN/A * documentation and/or other materials provided with the distribution;
122810SN/A * neither the name of the copyright holders nor the names of its
132810SN/A * contributors may be used to endorse or promote products derived from
142810SN/A * this software without specific prior written permission.
152810SN/A *
162810SN/A * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
172810SN/A * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
182810SN/A * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
192810SN/A * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
202810SN/A * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
212810SN/A * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
222810SN/A * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
232810SN/A * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
242810SN/A * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
252810SN/A * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
262810SN/A * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
272810SN/A *
282810SN/A * Authors: Ron Dreslinski
292810SN/A */
302810SN/A
312810SN/A/**
322810SN/A * @file
333861SN/A * Describes a strided prefetcher.
342810SN/A */
352810SN/A
362810SN/A#ifndef __MEM_CACHE_PREFETCH_STRIDE_PREFETCHER_HH__
372810SN/A#define __MEM_CACHE_PREFETCH_STRIDE_PREFETCHER_HH__
382810SN/A
398229Snate@binkert.org#include <climits>
408229Snate@binkert.org
415338Sstever@gmail.com#include "mem/cache/prefetch/base.hh"
422810SN/A
433861SN/Aclass StridePrefetcher : public BasePrefetcher
442810SN/A{
452810SN/A  protected:
462810SN/A
475875Ssteve.reinhardt@amd.com    static const int Max_Contexts = 64;
485875Ssteve.reinhardt@amd.com
495875Ssteve.reinhardt@amd.com    // These constants need to be changed with the type of the
505875Ssteve.reinhardt@amd.com    // 'confidence' field below.
515875Ssteve.reinhardt@amd.com    static const int Max_Conf = INT_MAX;
525875Ssteve.reinhardt@amd.com    static const int Min_Conf = INT_MIN;
535875Ssteve.reinhardt@amd.com
545875Ssteve.reinhardt@amd.com    class StrideEntry
552810SN/A    {
562810SN/A      public:
575875Ssteve.reinhardt@amd.com        Addr instAddr;
585875Ssteve.reinhardt@amd.com        Addr missAddr;
592810SN/A        int stride;
605875Ssteve.reinhardt@amd.com        int confidence;
615875Ssteve.reinhardt@amd.com    };
622810SN/A
635875Ssteve.reinhardt@amd.com    Addr *lastMissAddr[Max_Contexts];
642810SN/A
655875Ssteve.reinhardt@amd.com    std::list<StrideEntry*> table[Max_Contexts];
662810SN/A    Tick latency;
672810SN/A    int degree;
685714Shsul@eecs.umich.edu    bool useContextId;
692810SN/A
702810SN/A  public:
712810SN/A
725034SN/A    StridePrefetcher(const BaseCacheParams *p)
735034SN/A        : BasePrefetcher(p), latency(p->prefetch_latency),
745714Shsul@eecs.umich.edu          degree(p->prefetch_degree), useContextId(p->prefetch_use_cpu_id)
752810SN/A    {
762810SN/A    }
772810SN/A
782810SN/A    ~StridePrefetcher() {}
792810SN/A
803349SN/A    void calculatePrefetch(PacketPtr &pkt, std::list<Addr> &addresses,
813861SN/A                           std::list<Tick> &delays);
822810SN/A};
832810SN/A
842810SN/A#endif // __MEM_CACHE_PREFETCH_STRIDE_PREFETCHER_HH__
85