queued.cc revision 10623:b9646f4546ad 
1/*
2 * Copyright (c) 2014 ARM Limited
3 * All rights reserved
4 *
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software
9 * licensed hereunder.  You may use the software subject to the license
10 * terms below provided that you ensure that this notice is replicated
11 * unmodified and in its entirety in all distributions of the software,
12 * modified or unmodified, in source code or in binary form.
13 *
14 * Redistribution and use in source and binary forms, with or without
15 * modification, are permitted provided that the following conditions are
16 * met: redistributions of source code must retain the above copyright
17 * notice, this list of conditions and the following disclaimer;
18 * redistributions in binary form must reproduce the above copyright
19 * notice, this list of conditions and the following disclaimer in the
20 * documentation and/or other materials provided with the distribution;
21 * neither the name of the copyright holders nor the names of its
22 * contributors may be used to endorse or promote products derived from
23 * this software without specific prior written permission.
24 *
25 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
26 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
27 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
28 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
29 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
30 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
31 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
32 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
33 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
34 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
35 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
36 *
37 * Authors: Mitch Hayenga
38 */
39
40#include "debug/HWPrefetch.hh"
41#include "mem/cache/prefetch/queued.hh"
42#include "mem/cache/base.hh"
43
44QueuedPrefetcher::QueuedPrefetcher(const QueuedPrefetcherParams *p)
45    : BasePrefetcher(p), queueSize(p->queue_size), latency(p->latency),
46      queueSquash(p->queue_squash), queueFilter(p->queue_filter),
47      cacheSnoop(p->cache_snoop), tagPrefetch(p->tag_prefetch)
48{
49
50}
51
52QueuedPrefetcher::~QueuedPrefetcher()
53{
54    // Delete the queued prefetch packets
55    for (DeferredPacket &p : pfq) {
56        delete p.pkt->req;
57        delete p.pkt;
58    }
59}
60
61Tick
62QueuedPrefetcher::notify(const PacketPtr &pkt)
63{
64    // Verify this access type is observed by prefetcher
65    if (observeAccess(pkt)) {
66        Addr blk_addr = pkt->getAddr() & ~(Addr)(blkSize - 1);
67        bool is_secure = pkt->isSecure();
68
69        // Squash queued prefetches if demand miss to same line
70        if (queueSquash) {
71            auto itr = pfq.begin();
72            while (itr != pfq.end()) {
73                if (itr->pkt->getAddr() == blk_addr &&
74                    itr->pkt->isSecure() == is_secure) {
75                    delete itr->pkt->req;
76                    delete itr->pkt;
77                    itr = pfq.erase(itr);
78                } else {
79                    ++itr;
80                }
81            }
82
83            if (pfq.empty())
84                cache->deassertMemSideBusRequest(BaseCache::Request_PF);
85        }
86
87        // Calculate prefetches given this access
88        std::vector<Addr> addresses;
89        calculatePrefetch(pkt, addresses);
90
91        // Queue up generated prefetches
92        for (Addr pf_addr : addresses) {
93
94            // Block align prefetch address
95            pf_addr = pf_addr & ~(Addr)(blkSize - 1);
96
97            pfIdentified++;
98            DPRINTF(HWPrefetch, "Found a pf candidate addr: %#x, "
99                    "inserting into prefetch queue.\n", pf_addr);
100
101            if (queueFilter && inPrefetch(pf_addr, is_secure)) {
102                pfBufferHit++;
103                DPRINTF(HWPrefetch, "Prefetch addr already in "
104                        "prefetch queue\n");
105                continue;
106            }
107
108            if (cacheSnoop && (inCache(pf_addr, is_secure) ||
109                        inMissQueue(pf_addr, is_secure))) {
110                pfInCache++;
111                DPRINTF(HWPrefetch, "Dropping redundant in "
112                        "cache/MSHR prefetch addr:%#x\n", pf_addr);
113                continue;
114            }
115
116            // Create a prefetch memory request
117            Request *pf_req =
118                new Request(pf_addr, blkSize, 0, masterId);
119
120            if (is_secure) {
121                pf_req->setFlags(Request::SECURE);
122            }
123            pf_req->taskId(ContextSwitchTaskId::Prefetcher);
124            PacketPtr pf_pkt = new Packet(pf_req, MemCmd::HardPFReq);
125            pf_pkt->allocate();
126
127            if (pkt->req->hasContextId()) {
128                pf_req->setThreadContext(pkt->req->contextId(),
129                                         pkt->req->threadId());
130            }
131
132            if (tagPrefetch && pkt->req->hasPC()) {
133                // Tag prefetch packet with  accessing pc
134                pf_pkt->req->setPC(pkt->req->getPC());
135            }
136
137            // Verify prefetch buffer space for request
138            if (pfq.size() == queueSize) {
139                pfRemovedFull++;
140                PacketPtr old_pkt = pfq.begin()->pkt;
141                DPRINTF(HWPrefetch, "Prefetch queue full, removing "
142                        "oldest packet addr: %#x", old_pkt->getAddr());
143                delete old_pkt->req;
144                delete old_pkt;
145                pfq.pop_front();
146            }
147
148            Tick pf_time = curTick() + clockPeriod() * latency;
149            DPRINTF(HWPrefetch, "Prefetch queued. "
150                    "addr:%#x tick:%lld.\n", pf_addr, pf_time);
151
152            pfq.push_back(DeferredPacket(pf_time, pf_pkt));
153        }
154    }
155
156    return pfq.empty() ? MaxTick : pfq.front().tick;
157}
158
159PacketPtr
160QueuedPrefetcher::getPacket()
161{
162    DPRINTF(HWPrefetch, "Requesting a prefetch to issue.\n");
163
164    if (pfq.empty()) {
165        DPRINTF(HWPrefetch, "No hardware prefetches available.\n");
166        return NULL;
167    }
168
169    PacketPtr pkt = pfq.begin()->pkt;
170    pfq.pop_front();
171
172    pfIssued++;
173    assert(pkt != NULL);
174    DPRINTF(HWPrefetch, "Generating prefetch for %#x.\n", pkt->getAddr());
175    return pkt;
176}
177
178bool
179QueuedPrefetcher::inPrefetch(Addr address, bool is_secure) const
180{
181    for (const DeferredPacket &dp : pfq) {
182        if (dp.pkt->getAddr() == address &&
183            dp.pkt->isSecure() == is_secure) return true;
184    }
185
186    return false;
187}
188
189void
190QueuedPrefetcher::regStats()
191{
192    BasePrefetcher::regStats();
193
194    pfIdentified
195        .name(name() + ".pfIdentified")
196        .desc("number of prefetch candidates identified");
197
198    pfBufferHit
199        .name(name() + ".pfBufferHit")
200        .desc("number of redundant prefetches already in prefetch queue");
201
202    pfInCache
203        .name(name() + ".pfInCache")
204        .desc("number of redundant prefetches already in cache/mshr dropped");
205
206    pfRemovedFull
207        .name(name() + ".pfRemovedFull")
208        .desc("number of prefetches dropped due to prefetch queue size");
209
210    pfSpanPage
211        .name(name() + ".pfSpanPage")
212        .desc("number of prefetches not generated due to page crossing");
213}
214