mshr_queue.cc revision 10766
12810SN/A/*
210764Sandreas.hansson@arm.com * Copyright (c) 2012-2013, 2015 ARM Limited
39347SAndreas.Sandberg@arm.com * All rights reserved.
49347SAndreas.Sandberg@arm.com *
59347SAndreas.Sandberg@arm.com * The license below extends only to copyright in the software and shall
69347SAndreas.Sandberg@arm.com * not be construed as granting a license to any other intellectual
79347SAndreas.Sandberg@arm.com * property including but not limited to intellectual property relating
89347SAndreas.Sandberg@arm.com * to a hardware implementation of the functionality of the software
99347SAndreas.Sandberg@arm.com * licensed hereunder.  You may use the software subject to the license
109347SAndreas.Sandberg@arm.com * terms below provided that you ensure that this notice is replicated
119347SAndreas.Sandberg@arm.com * unmodified and in its entirety in all distributions of the software,
129347SAndreas.Sandberg@arm.com * modified or unmodified, in source code or in binary form.
139347SAndreas.Sandberg@arm.com *
142810SN/A * Copyright (c) 2003-2005 The Regents of The University of Michigan
152810SN/A * All rights reserved.
162810SN/A *
172810SN/A * Redistribution and use in source and binary forms, with or without
182810SN/A * modification, are permitted provided that the following conditions are
192810SN/A * met: redistributions of source code must retain the above copyright
202810SN/A * notice, this list of conditions and the following disclaimer;
212810SN/A * redistributions in binary form must reproduce the above copyright
222810SN/A * notice, this list of conditions and the following disclaimer in the
232810SN/A * documentation and/or other materials provided with the distribution;
242810SN/A * neither the name of the copyright holders nor the names of its
252810SN/A * contributors may be used to endorse or promote products derived from
262810SN/A * this software without specific prior written permission.
272810SN/A *
282810SN/A * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
292810SN/A * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
302810SN/A * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
312810SN/A * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
322810SN/A * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
332810SN/A * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
342810SN/A * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
352810SN/A * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
362810SN/A * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
372810SN/A * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
382810SN/A * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
392810SN/A *
402810SN/A * Authors: Erik Hallnor
419347SAndreas.Sandberg@arm.com *          Andreas Sandberg
422810SN/A */
432810SN/A
442810SN/A/** @file
454626SN/A * Definition of MSHRQueue class functions.
462810SN/A */
472810SN/A
4810509SAli.Saidi@ARM.com#include "base/trace.hh"
495338Sstever@gmail.com#include "mem/cache/mshr_queue.hh"
5010509SAli.Saidi@ARM.com#include "debug/Drain.hh"
512810SN/A
522810SN/Ausing namespace std;
532810SN/A
545314SN/AMSHRQueue::MSHRQueue(const std::string &_label,
5510622Smitch.hayenga@arm.com                     int num_entries, int reserve, int demand_reserve,
5610622Smitch.hayenga@arm.com                     int _index)
579725Sandreas.hansson@arm.com    : label(_label), numEntries(num_entries + reserve - 1),
5810622Smitch.hayenga@arm.com      numReserve(reserve), demandReserve(demand_reserve),
5910622Smitch.hayenga@arm.com      registers(numEntries), drainManager(NULL), allocated(0),
6010622Smitch.hayenga@arm.com      inServiceEntries(0), index(_index)
612810SN/A{
624626SN/A    for (int i = 0; i < numEntries; ++i) {
634626SN/A        registers[i].queue = this;
642810SN/A        freeList.push_back(&registers[i]);
652810SN/A    }
662810SN/A}
672810SN/A
684626SN/AMSHR *
6910764Sandreas.hansson@arm.comMSHRQueue::findMatch(Addr blk_addr, bool is_secure) const
702810SN/A{
7110766Sandreas.hansson@arm.com    for (const auto& mshr : allocatedList) {
7210764Sandreas.hansson@arm.com        if (mshr->blkAddr == blk_addr && mshr->isSecure == is_secure) {
732810SN/A            return mshr;
742810SN/A        }
752810SN/A    }
762810SN/A    return NULL;
772810SN/A}
782810SN/A
792810SN/Abool
8010764Sandreas.hansson@arm.comMSHRQueue::findMatches(Addr blk_addr, bool is_secure,
8110764Sandreas.hansson@arm.com                       vector<MSHR*>& matches) const
822810SN/A{
832810SN/A    // Need an empty vector
842810SN/A    assert(matches.empty());
852810SN/A    bool retval = false;
8610766Sandreas.hansson@arm.com    for (const auto& mshr : allocatedList) {
8710764Sandreas.hansson@arm.com        if (mshr->blkAddr == blk_addr && mshr->isSecure == is_secure) {
882810SN/A            retval = true;
892810SN/A            matches.push_back(mshr);
902810SN/A        }
912810SN/A    }
922810SN/A    return retval;
934920SN/A}
942810SN/A
954920SN/A
964920SN/Abool
974920SN/AMSHRQueue::checkFunctional(PacketPtr pkt, Addr blk_addr)
984920SN/A{
995314SN/A    pkt->pushLabel(label);
10010766Sandreas.hansson@arm.com    for (const auto& mshr : allocatedList) {
10110764Sandreas.hansson@arm.com        if (mshr->blkAddr == blk_addr && mshr->checkFunctional(pkt)) {
1025314SN/A            pkt->popLabel();
1034920SN/A            return true;
1044920SN/A        }
1054920SN/A    }
1065314SN/A    pkt->popLabel();
1074920SN/A    return false;
1082810SN/A}
1092810SN/A
1104920SN/A
1114626SN/AMSHR *
11210764Sandreas.hansson@arm.comMSHRQueue::findPending(Addr blk_addr, bool is_secure) const
1132810SN/A{
11410766Sandreas.hansson@arm.com    for (const auto& mshr : readyList) {
11510764Sandreas.hansson@arm.com        if (mshr->blkAddr == blk_addr && mshr->isSecure == is_secure) {
11610764Sandreas.hansson@arm.com            return mshr;
1172810SN/A        }
1182810SN/A    }
1192810SN/A    return NULL;
1202810SN/A}
1212810SN/A
1224666SN/A
1234666SN/AMSHR::Iterator
1244666SN/AMSHRQueue::addToReadyList(MSHR *mshr)
1254666SN/A{
1264871SN/A    if (readyList.empty() || readyList.back()->readyTime <= mshr->readyTime) {
1274666SN/A        return readyList.insert(readyList.end(), mshr);
1284666SN/A    }
1294666SN/A
13010766Sandreas.hansson@arm.com    for (auto i = readyList.begin(); i != readyList.end(); ++i) {
1314871SN/A        if ((*i)->readyTime > mshr->readyTime) {
1324666SN/A            return readyList.insert(i, mshr);
1334666SN/A        }
1344666SN/A    }
1354666SN/A    assert(false);
13610766Sandreas.hansson@arm.com    return readyList.end();  // keep stupid compilers happy
1374666SN/A}
1384666SN/A
1394666SN/A
1404626SN/AMSHR *
14110764Sandreas.hansson@arm.comMSHRQueue::allocate(Addr blk_addr, unsigned blk_size, PacketPtr pkt,
14210764Sandreas.hansson@arm.com                    Tick when_ready, Counter order)
1432810SN/A{
1443149SN/A    assert(!freeList.empty());
1452810SN/A    MSHR *mshr = freeList.front();
1462810SN/A    assert(mshr->getNumTargets() == 0);
1472810SN/A    freeList.pop_front();
1482810SN/A
14910764Sandreas.hansson@arm.com    mshr->allocate(blk_addr, blk_size, pkt, when_ready, order);
1502810SN/A    mshr->allocIter = allocatedList.insert(allocatedList.end(), mshr);
1514666SN/A    mshr->readyIter = addToReadyList(mshr);
1522810SN/A
1532810SN/A    allocated += 1;
1542810SN/A    return mshr;
1552810SN/A}
1562810SN/A
1572810SN/A
1582810SN/Avoid
1594626SN/AMSHRQueue::deallocate(MSHR *mshr)
1602810SN/A{
1612810SN/A    deallocateOne(mshr);
1622810SN/A}
1632810SN/A
1642810SN/AMSHR::Iterator
1654626SN/AMSHRQueue::deallocateOne(MSHR *mshr)
1662810SN/A{
1672810SN/A    MSHR::Iterator retval = allocatedList.erase(mshr->allocIter);
1682810SN/A    freeList.push_front(mshr);
1692810SN/A    allocated--;
1702810SN/A    if (mshr->inService) {
1714626SN/A        inServiceEntries--;
1722810SN/A    } else {
1734666SN/A        readyList.erase(mshr->readyIter);
1742810SN/A    }
1752810SN/A    mshr->deallocate();
1769347SAndreas.Sandberg@arm.com    if (drainManager && allocated == 0) {
1779347SAndreas.Sandberg@arm.com        // Notify the drain manager that we have completed draining if
1789347SAndreas.Sandberg@arm.com        // there are no other outstanding requests in this MSHR queue.
17910509SAli.Saidi@ARM.com        DPRINTF(Drain, "MSHRQueue now empty, signalling drained\n");
1809347SAndreas.Sandberg@arm.com        drainManager->signalDrainDone();
1819347SAndreas.Sandberg@arm.com        drainManager = NULL;
1829347SAndreas.Sandberg@arm.com        setDrainState(Drainable::Drained);
1839347SAndreas.Sandberg@arm.com    }
1842810SN/A    return retval;
1852810SN/A}
1862810SN/A
1872810SN/Avoid
1882810SN/AMSHRQueue::moveToFront(MSHR *mshr)
1892810SN/A{
1902810SN/A    if (!mshr->inService) {
1912810SN/A        assert(mshr == *(mshr->readyIter));
1924666SN/A        readyList.erase(mshr->readyIter);
1934666SN/A        mshr->readyIter = readyList.insert(readyList.begin(), mshr);
1942810SN/A    }
1952810SN/A}
1962810SN/A
1972810SN/Avoid
19810679Sandreas.hansson@arm.comMSHRQueue::markInService(MSHR *mshr, bool pending_dirty_resp)
1992810SN/A{
20010679Sandreas.hansson@arm.com    if (mshr->markInService(pending_dirty_resp)) {
2012810SN/A        deallocate(mshr);
2024908SN/A    } else {
2034908SN/A        readyList.erase(mshr->readyIter);
2044908SN/A        inServiceEntries += 1;
2052810SN/A    }
2062810SN/A}
2072810SN/A
2082810SN/Avoid
2094626SN/AMSHRQueue::markPending(MSHR *mshr)
2102810SN/A{
2114666SN/A    assert(mshr->inService);
2122810SN/A    mshr->inService = false;
2134626SN/A    --inServiceEntries;
2142810SN/A    /**
2152810SN/A     * @ todo might want to add rerequests to front of pending list for
2162810SN/A     * performance.
2172810SN/A     */
2184666SN/A    mshr->readyIter = addToReadyList(mshr);
2192810SN/A}
2202810SN/A
22110192Smitch.hayenga@arm.combool
22210192Smitch.hayenga@arm.comMSHRQueue::forceDeallocateTarget(MSHR *mshr)
22310192Smitch.hayenga@arm.com{
22410192Smitch.hayenga@arm.com    bool was_full = isFull();
22510192Smitch.hayenga@arm.com    assert(mshr->hasTargets());
22610192Smitch.hayenga@arm.com    // Pop the prefetch off of the target list
22710192Smitch.hayenga@arm.com    mshr->popTarget();
22810192Smitch.hayenga@arm.com    // Delete mshr if no remaining targets
22910192Smitch.hayenga@arm.com    if (!mshr->hasTargets() && !mshr->promoteDeferredTargets()) {
23010192Smitch.hayenga@arm.com        deallocateOne(mshr);
23110192Smitch.hayenga@arm.com    }
23210192Smitch.hayenga@arm.com
23310192Smitch.hayenga@arm.com    // Notify if MSHR queue no longer full
23410192Smitch.hayenga@arm.com    return was_full && !isFull();
23510192Smitch.hayenga@arm.com}
23610192Smitch.hayenga@arm.com
2372810SN/Avoid
2382813SN/AMSHRQueue::squash(int threadNum)
2392810SN/A{
24010766Sandreas.hansson@arm.com    for (auto i = allocatedList.begin(); i != allocatedList.end();) {
2412810SN/A        MSHR *mshr = *i;
2422813SN/A        if (mshr->threadNum == threadNum) {
2432810SN/A            while (mshr->hasTargets()) {
2442810SN/A                mshr->popTarget();
2455715Shsul@eecs.umich.edu                assert(0/*target->req->threadId()*/ == threadNum);
2462810SN/A            }
2472810SN/A            assert(!mshr->hasTargets());
2489725Sandreas.hansson@arm.com            assert(mshr->getNumTargets()==0);
2492810SN/A            if (!mshr->inService) {
2502810SN/A                i = deallocateOne(mshr);
2512810SN/A            } else {
2522810SN/A                //mshr->pkt->flags &= ~CACHE_LINE_FILL;
2532810SN/A                ++i;
2542810SN/A            }
2552810SN/A        } else {
2562810SN/A            ++i;
2572810SN/A        }
2582810SN/A    }
2592810SN/A}
2609347SAndreas.Sandberg@arm.com
2619347SAndreas.Sandberg@arm.comunsigned int
2629347SAndreas.Sandberg@arm.comMSHRQueue::drain(DrainManager *dm)
2639347SAndreas.Sandberg@arm.com{
2649347SAndreas.Sandberg@arm.com    if (allocated == 0) {
2659347SAndreas.Sandberg@arm.com        setDrainState(Drainable::Drained);
2669347SAndreas.Sandberg@arm.com        return 0;
2679347SAndreas.Sandberg@arm.com    } else {
2689347SAndreas.Sandberg@arm.com        drainManager = dm;
2699347SAndreas.Sandberg@arm.com        setDrainState(Drainable::Draining);
2709347SAndreas.Sandberg@arm.com        return 1;
2719347SAndreas.Sandberg@arm.com    }
2729347SAndreas.Sandberg@arm.com}
273