bridge.hh revision 9294:8fb03b13de02 
1/*
2 * Copyright (c) 2011-2012 ARM Limited
3 * All rights reserved
4 *
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software
9 * licensed hereunder.  You may use the software subject to the license
10 * terms below provided that you ensure that this notice is replicated
11 * unmodified and in its entirety in all distributions of the software,
12 * modified or unmodified, in source code or in binary form.
13 *
14 * Copyright (c) 2006 The Regents of The University of Michigan
15 * All rights reserved.
16 *
17 * Redistribution and use in source and binary forms, with or without
18 * modification, are permitted provided that the following conditions are
19 * met: redistributions of source code must retain the above copyright
20 * notice, this list of conditions and the following disclaimer;
21 * redistributions in binary form must reproduce the above copyright
22 * notice, this list of conditions and the following disclaimer in the
23 * documentation and/or other materials provided with the distribution;
24 * neither the name of the copyright holders nor the names of its
25 * contributors may be used to endorse or promote products derived from
26 * this software without specific prior written permission.
27 *
28 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
29 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
30 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
31 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
32 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
33 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
34 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
35 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
36 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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38 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
39 *
40 * Authors: Ali Saidi
41 *          Steve Reinhardt
42 *          Andreas Hansson
43 */
44
45/**
46 * @file
47 * Declaration of a memory-mapped bus bridge that connects a master
48 * and a slave through a request and response queue.
49 */
50
51#ifndef __MEM_BRIDGE_HH__
52#define __MEM_BRIDGE_HH__
53
54#include <list>
55
56#include "base/types.hh"
57#include "mem/mem_object.hh"
58#include "params/Bridge.hh"
59
60/**
61 * A bridge is used to interface two different busses (or in general a
62 * memory-mapped master and slave), with buffering for requests and
63 * responses. The bridge has a fixed delay for packets passing through
64 * it and responds to a fixed set of address ranges.
65 *
66 * The bridge comprises a slave port and a master port, that buffer
67 * outgoing responses and requests respectively. Buffer space is
68 * reserved when a request arrives, also reserving response space
69 * before forwarding the request. If there is no space present, then
70 * the bridge will delay accepting the packet until space becomes
71 * available.
72 */
73class Bridge : public MemObject
74{
75  protected:
76
77    /**
78     * A bridge request state stores packets along with their sender
79     * state and original source. It has enough information to also
80     * restore the response once it comes back to the bridge.
81     */
82    class RequestState : public Packet::SenderState
83    {
84
85      public:
86
87        Packet::SenderState *origSenderState;
88        PortID origSrc;
89
90        RequestState(PacketPtr _pkt)
91            : origSenderState(_pkt->senderState),
92              origSrc(_pkt->getSrc())
93        { }
94
95        void fixResponse(PacketPtr pkt)
96        {
97            assert(pkt->senderState == this);
98            pkt->setDest(origSrc);
99            pkt->senderState = origSenderState;
100        }
101    };
102
103    /**
104     * A deferred packet stores a packet along with its scheduled
105     * transmission time
106     */
107    class DeferredPacket
108    {
109
110      public:
111
112        Tick tick;
113        PacketPtr pkt;
114
115        DeferredPacket(PacketPtr _pkt, Tick _tick) : tick(_tick), pkt(_pkt)
116        { }
117    };
118
119    // Forward declaration to allow the slave port to have a pointer
120    class BridgeMasterPort;
121
122    /**
123     * The port on the side that receives requests and sends
124     * responses. The slave port has a set of address ranges that it
125     * is responsible for. The slave port also has a buffer for the
126     * responses not yet sent.
127     */
128    class BridgeSlavePort : public SlavePort
129    {
130
131      private:
132
133        /** The bridge to which this port belongs. */
134        Bridge& bridge;
135
136        /**
137         * Master port on the other side of the bridge (connected to
138         * the other bus).
139         */
140        BridgeMasterPort& masterPort;
141
142        /** Minimum request delay though this bridge. */
143        Cycles delay;
144
145        /** Address ranges to pass through the bridge */
146        AddrRangeList ranges;
147
148        /**
149         * Response packet queue. Response packets are held in this
150         * queue for a specified delay to model the processing delay
151         * of the bridge.
152         */
153        std::list<DeferredPacket> transmitList;
154
155        /** Counter to track the outstanding responses. */
156        unsigned int outstandingResponses;
157
158        /** If we should send a retry when space becomes available. */
159        bool retryReq;
160
161        /** Max queue size for reserved responses. */
162        unsigned int respQueueLimit;
163
164        /**
165         * Is this side blocked from accepting new response packets.
166         *
167         * @return true if the reserved space has reached the set limit
168         */
169        bool respQueueFull();
170
171        /**
172         * Handle send event, scheduled when the packet at the head of
173         * the response queue is ready to transmit (for timing
174         * accesses only).
175         */
176        void trySendTiming();
177
178        /** Send event for the response queue. */
179        EventWrapper<BridgeSlavePort,
180                     &BridgeSlavePort::trySendTiming> sendEvent;
181
182      public:
183
184        /**
185         * Constructor for the BridgeSlavePort.
186         *
187         * @param _name the port name including the owner
188         * @param _bridge the structural owner
189         * @param _masterPort the master port on the other side of the bridge
190         * @param _delay the delay in cycles from receiving to sending
191         * @param _resp_limit the size of the response queue
192         * @param _ranges a number of address ranges to forward
193         */
194        BridgeSlavePort(const std::string& _name, Bridge& _bridge,
195                        BridgeMasterPort& _masterPort, Cycles _delay,
196                        int _resp_limit, std::vector<AddrRange> _ranges);
197
198        /**
199         * Queue a response packet to be sent out later and also schedule
200         * a send if necessary.
201         *
202         * @param pkt a response to send out after a delay
203         * @param when tick when response packet should be sent
204         */
205        void schedTimingResp(PacketPtr pkt, Tick when);
206
207        /**
208         * Retry any stalled request that we have failed to accept at
209         * an earlier point in time. This call will do nothing if no
210         * request is waiting.
211         */
212        void retryStalledReq();
213
214      protected:
215
216        /** When receiving a timing request from the peer port,
217            pass it to the bridge. */
218        bool recvTimingReq(PacketPtr pkt);
219
220        /** When receiving a retry request from the peer port,
221            pass it to the bridge. */
222        void recvRetry();
223
224        /** When receiving a Atomic requestfrom the peer port,
225            pass it to the bridge. */
226        Tick recvAtomic(PacketPtr pkt);
227
228        /** When receiving a Functional request from the peer port,
229            pass it to the bridge. */
230        void recvFunctional(PacketPtr pkt);
231
232        /** When receiving a address range request the peer port,
233            pass it to the bridge. */
234        AddrRangeList getAddrRanges() const;
235    };
236
237
238    /**
239     * Port on the side that forwards requests and receives
240     * responses. The master port has a buffer for the requests not
241     * yet sent.
242     */
243    class BridgeMasterPort : public MasterPort
244    {
245
246      private:
247
248        /** The bridge to which this port belongs. */
249        Bridge& bridge;
250
251        /**
252         * The slave port on the other side of the bridge (connected
253         * to the other bus).
254         */
255        BridgeSlavePort& slavePort;
256
257        /** Minimum delay though this bridge. */
258        Cycles delay;
259
260        /**
261         * Request packet queue. Request packets are held in this
262         * queue for a specified delay to model the processing delay
263         * of the bridge.
264         */
265        std::list<DeferredPacket> transmitList;
266
267        /** Max queue size for request packets */
268        unsigned int reqQueueLimit;
269
270        /**
271         * Handle send event, scheduled when the packet at the head of
272         * the outbound queue is ready to transmit (for timing
273         * accesses only).
274         */
275        void trySendTiming();
276
277        /** Send event for the request queue. */
278        EventWrapper<BridgeMasterPort,
279                     &BridgeMasterPort::trySendTiming> sendEvent;
280
281      public:
282
283        /**
284         * Constructor for the BridgeMasterPort.
285         *
286         * @param _name the port name including the owner
287         * @param _bridge the structural owner
288         * @param _slavePort the slave port on the other side of the bridge
289         * @param _delay the delay in cycles from receiving to sending
290         * @param _req_limit the size of the request queue
291         */
292        BridgeMasterPort(const std::string& _name, Bridge& _bridge,
293                         BridgeSlavePort& _slavePort, Cycles _delay,
294                         int _req_limit);
295
296        /**
297         * Is this side blocked from accepting new request packets.
298         *
299         * @return true if the occupied space has reached the set limit
300         */
301        bool reqQueueFull();
302
303        /**
304         * Queue a request packet to be sent out later and also schedule
305         * a send if necessary.
306         *
307         * @param pkt a request to send out after a delay
308         * @param when tick when response packet should be sent
309         */
310        void schedTimingReq(PacketPtr pkt, Tick when);
311
312        /**
313         * Check a functional request against the packets in our
314         * request queue.
315         *
316         * @param pkt packet to check against
317         *
318         * @return true if we find a match
319         */
320        bool checkFunctional(PacketPtr pkt);
321
322      protected:
323
324        /** When receiving a timing request from the peer port,
325            pass it to the bridge. */
326        bool recvTimingResp(PacketPtr pkt);
327
328        /** When receiving a retry request from the peer port,
329            pass it to the bridge. */
330        void recvRetry();
331    };
332
333    /** Slave port of the bridge. */
334    BridgeSlavePort slavePort;
335
336    /** Master port of the bridge. */
337    BridgeMasterPort masterPort;
338
339  public:
340
341    virtual BaseMasterPort& getMasterPort(const std::string& if_name,
342                                          PortID idx = InvalidPortID);
343    virtual BaseSlavePort& getSlavePort(const std::string& if_name,
344                                        PortID idx = InvalidPortID);
345
346    virtual void init();
347
348    typedef BridgeParams Params;
349
350    Bridge(Params *p);
351};
352
353#endif //__MEM_BUS_HH__
354