bridge.hh revision 2643
12568SN/A/* 22568SN/A * Copyright (c) 2006 The Regents of The University of Michigan 32568SN/A * All rights reserved. 42568SN/A * 52568SN/A * Redistribution and use in source and binary forms, with or without 62568SN/A * modification, are permitted provided that the following conditions are 72568SN/A * met: redistributions of source code must retain the above copyright 82568SN/A * notice, this list of conditions and the following disclaimer; 92568SN/A * redistributions in binary form must reproduce the above copyright 102568SN/A * notice, this list of conditions and the following disclaimer in the 112568SN/A * documentation and/or other materials provided with the distribution; 122568SN/A * neither the name of the copyright holders nor the names of its 132568SN/A * contributors may be used to endorse or promote products derived from 142568SN/A * this software without specific prior written permission. 152568SN/A * 162568SN/A * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 172568SN/A * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 182568SN/A * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 192568SN/A * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 202568SN/A * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 212568SN/A * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 222568SN/A * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 232568SN/A * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 242568SN/A * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 252568SN/A * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 262568SN/A * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 272568SN/A */ 282568SN/A 292568SN/A/** 302568SN/A * @file Decleration of a simple bus bridge object with no buffering 312568SN/A */ 322568SN/A 332568SN/A#ifndef __MEM_BRIDGE_HH__ 342568SN/A#define __MEM_BRIDGE_HH__ 352568SN/A 362568SN/A#include <string> 372568SN/A#include <list> 382568SN/A#include <inttypes.h> 392568SN/A#include <queue> 402568SN/A 412568SN/A 422568SN/A#include "mem/mem_object.hh" 432568SN/A#include "mem/packet.hh" 442568SN/A#include "mem/port.hh" 452568SN/A#include "sim/eventq.hh" 462568SN/A 472568SN/Aclass Bridge : public MemObject 482568SN/A{ 492568SN/A protected: 502568SN/A /** Decleration of the buses port type, one will be instantiated for each 512568SN/A of the interfaces connecting to the bus. */ 522568SN/A class BridgePort : public Port 532568SN/A { 542643Sstever@eecs.umich.edu /** A pointer to the bridge to which this port belongs. */ 552568SN/A Bridge *bridge; 562568SN/A 572643Sstever@eecs.umich.edu /** 582643Sstever@eecs.umich.edu * Pointer to the port on the other side of the bridge 592643Sstever@eecs.umich.edu * (connected to the other bus). 602643Sstever@eecs.umich.edu */ 612643Sstever@eecs.umich.edu BridgePort *otherPort; 622643Sstever@eecs.umich.edu 632643Sstever@eecs.umich.edu /** Minimum delay though this bridge. */ 642643Sstever@eecs.umich.edu Tick delay; 652643Sstever@eecs.umich.edu 662643Sstever@eecs.umich.edu class PacketBuffer : public Packet::SenderState { 672643Sstever@eecs.umich.edu 682643Sstever@eecs.umich.edu public: 692643Sstever@eecs.umich.edu Tick ready; 702643Sstever@eecs.umich.edu Packet *pkt; 712643Sstever@eecs.umich.edu Packet::SenderState *origSenderState; 722643Sstever@eecs.umich.edu short origSrc; 732643Sstever@eecs.umich.edu bool expectResponse; 742643Sstever@eecs.umich.edu 752643Sstever@eecs.umich.edu PacketBuffer(Packet *_pkt, Tick t) 762643Sstever@eecs.umich.edu : ready(t), pkt(_pkt), 772643Sstever@eecs.umich.edu origSenderState(_pkt->senderState), origSrc(_pkt->getSrc()), 782643Sstever@eecs.umich.edu expectResponse(_pkt->needsResponse()) 792643Sstever@eecs.umich.edu { 802643Sstever@eecs.umich.edu pkt->senderState = this; 812643Sstever@eecs.umich.edu } 822643Sstever@eecs.umich.edu 832643Sstever@eecs.umich.edu void fixResponse(Packet *pkt) 842643Sstever@eecs.umich.edu { 852643Sstever@eecs.umich.edu assert(pkt->senderState == this); 862643Sstever@eecs.umich.edu pkt->setDest(origSrc); 872643Sstever@eecs.umich.edu pkt->senderState = origSenderState; 882643Sstever@eecs.umich.edu } 892643Sstever@eecs.umich.edu }; 902643Sstever@eecs.umich.edu 912643Sstever@eecs.umich.edu /** 922643Sstever@eecs.umich.edu * Outbound packet queue. Packets are held in this queue for a 932643Sstever@eecs.umich.edu * specified delay to model the processing delay of the 942643Sstever@eecs.umich.edu * bridge. 952643Sstever@eecs.umich.edu */ 962643Sstever@eecs.umich.edu std::list<PacketBuffer*> sendQueue; 972643Sstever@eecs.umich.edu 982643Sstever@eecs.umich.edu int outstandingResponses; 992643Sstever@eecs.umich.edu 1002643Sstever@eecs.umich.edu /** Max queue size for outbound packets */ 1012643Sstever@eecs.umich.edu int queueLimit; 1022643Sstever@eecs.umich.edu 1032643Sstever@eecs.umich.edu /** 1042643Sstever@eecs.umich.edu * Is this side blocked from accepting outbound packets? 1052643Sstever@eecs.umich.edu */ 1062643Sstever@eecs.umich.edu bool queueFull() { return (sendQueue.size() == queueLimit); } 1072643Sstever@eecs.umich.edu 1082643Sstever@eecs.umich.edu bool queueForSendTiming(Packet *pkt); 1092643Sstever@eecs.umich.edu 1102643Sstever@eecs.umich.edu void finishSend(PacketBuffer *buf); 1112643Sstever@eecs.umich.edu 1122643Sstever@eecs.umich.edu /** 1132643Sstever@eecs.umich.edu * Handle send event, scheduled when the packet at the head of 1142643Sstever@eecs.umich.edu * the outbound queue is ready to transmit (for timing 1152643Sstever@eecs.umich.edu * accesses only). 1162643Sstever@eecs.umich.edu */ 1172643Sstever@eecs.umich.edu void trySend(); 1182643Sstever@eecs.umich.edu 1192643Sstever@eecs.umich.edu class SendEvent : public Event 1202643Sstever@eecs.umich.edu { 1212643Sstever@eecs.umich.edu BridgePort *port; 1222643Sstever@eecs.umich.edu 1232643Sstever@eecs.umich.edu public: 1242643Sstever@eecs.umich.edu SendEvent(BridgePort *p) 1252643Sstever@eecs.umich.edu : Event(&mainEventQueue), port(p) {} 1262643Sstever@eecs.umich.edu 1272643Sstever@eecs.umich.edu virtual void process() { port->trySend(); } 1282643Sstever@eecs.umich.edu 1292643Sstever@eecs.umich.edu virtual const char *description() { return "bridge send event"; } 1302643Sstever@eecs.umich.edu }; 1312643Sstever@eecs.umich.edu 1322643Sstever@eecs.umich.edu SendEvent sendEvent; 1332568SN/A 1342568SN/A public: 1352568SN/A 1362568SN/A /** Constructor for the BusPort.*/ 1372643Sstever@eecs.umich.edu BridgePort(const std::string &_name, 1382643Sstever@eecs.umich.edu Bridge *_bridge, BridgePort *_otherPort, 1392643Sstever@eecs.umich.edu int _delay, int _queueLimit); 1402568SN/A 1412568SN/A protected: 1422568SN/A 1432643Sstever@eecs.umich.edu /** When receiving a timing request from the peer port, 1442643Sstever@eecs.umich.edu pass it to the bridge. */ 1452643Sstever@eecs.umich.edu virtual bool recvTiming(Packet *pkt); 1462568SN/A 1472643Sstever@eecs.umich.edu /** When receiving a retry request from the peer port, 1482568SN/A pass it to the bridge. */ 1492568SN/A virtual Packet* recvRetry(); 1502568SN/A 1512643Sstever@eecs.umich.edu /** When receiving a Atomic requestfrom the peer port, 1522568SN/A pass it to the bridge. */ 1532643Sstever@eecs.umich.edu virtual Tick recvAtomic(Packet *pkt); 1542568SN/A 1552643Sstever@eecs.umich.edu /** When receiving a Functional request from the peer port, 1562568SN/A pass it to the bridge. */ 1572643Sstever@eecs.umich.edu virtual void recvFunctional(Packet *pkt); 1582568SN/A 1592643Sstever@eecs.umich.edu /** When receiving a status changefrom the peer port, 1602568SN/A pass it to the bridge. */ 1612643Sstever@eecs.umich.edu virtual void recvStatusChange(Status status); 1622568SN/A 1632643Sstever@eecs.umich.edu /** When receiving a address range request the peer port, 1642568SN/A pass it to the bridge. */ 1652643Sstever@eecs.umich.edu virtual void getDeviceAddressRanges(AddrRangeList &resp, 1662643Sstever@eecs.umich.edu AddrRangeList &snoop); 1672568SN/A }; 1682568SN/A 1692643Sstever@eecs.umich.edu BridgePort portA, portB; 1702568SN/A 1712568SN/A /** If this bridge should acknowledge writes. */ 1722568SN/A bool ackWrites; 1732568SN/A 1742568SN/A public: 1752568SN/A 1762568SN/A /** A function used to return the port associated with this bus object. */ 1772643Sstever@eecs.umich.edu virtual Port *getPort(const std::string &if_name); 1782568SN/A 1792568SN/A virtual void init(); 1802568SN/A 1812643Sstever@eecs.umich.edu Bridge(const std::string &n, int qsa, int qsb, Tick _delay, int write_ack); 1822568SN/A}; 1832568SN/A 1842568SN/A#endif //__MEM_BUS_HH__ 185