bridge.hh revision 12084
12568SN/A/* 29786Sandreas.hansson@arm.com * Copyright (c) 2011-2013 ARM Limited 38713Sandreas.hansson@arm.com * All rights reserved 48713Sandreas.hansson@arm.com * 58713Sandreas.hansson@arm.com * The license below extends only to copyright in the software and shall 68713Sandreas.hansson@arm.com * not be construed as granting a license to any other intellectual 78713Sandreas.hansson@arm.com * property including but not limited to intellectual property relating 88713Sandreas.hansson@arm.com * to a hardware implementation of the functionality of the software 98713Sandreas.hansson@arm.com * licensed hereunder. You may use the software subject to the license 108713Sandreas.hansson@arm.com * terms below provided that you ensure that this notice is replicated 118713Sandreas.hansson@arm.com * unmodified and in its entirety in all distributions of the software, 128713Sandreas.hansson@arm.com * modified or unmodified, in source code or in binary form. 138713Sandreas.hansson@arm.com * 142568SN/A * Copyright (c) 2006 The Regents of The University of Michigan 152568SN/A * All rights reserved. 162568SN/A * 172568SN/A * Redistribution and use in source and binary forms, with or without 182568SN/A * modification, are permitted provided that the following conditions are 192568SN/A * met: redistributions of source code must retain the above copyright 202568SN/A * notice, this list of conditions and the following disclaimer; 212568SN/A * redistributions in binary form must reproduce the above copyright 222568SN/A * notice, this list of conditions and the following disclaimer in the 232568SN/A * documentation and/or other materials provided with the distribution; 242568SN/A * neither the name of the copyright holders nor the names of its 252568SN/A * contributors may be used to endorse or promote products derived from 262568SN/A * this software without specific prior written permission. 272568SN/A * 282568SN/A * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 292568SN/A * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 302568SN/A * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 312568SN/A * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 322568SN/A * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 332568SN/A * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 342568SN/A * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 352568SN/A * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 362568SN/A * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 372568SN/A * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 382568SN/A * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 392665Ssaidi@eecs.umich.edu * 402665Ssaidi@eecs.umich.edu * Authors: Ali Saidi 412665Ssaidi@eecs.umich.edu * Steve Reinhardt 428713Sandreas.hansson@arm.com * Andreas Hansson 432568SN/A */ 442568SN/A 452568SN/A/** 462982Sstever@eecs.umich.edu * @file 4710405Sandreas.hansson@arm.com * Declaration of a memory-mapped bridge that connects a master 488713Sandreas.hansson@arm.com * and a slave through a request and response queue. 492568SN/A */ 502568SN/A 512568SN/A#ifndef __MEM_BRIDGE_HH__ 522568SN/A#define __MEM_BRIDGE_HH__ 532568SN/A 549786Sandreas.hansson@arm.com#include <deque> 552568SN/A 566215Snate@binkert.org#include "base/types.hh" 572568SN/A#include "mem/mem_object.hh" 584762Snate@binkert.org#include "params/Bridge.hh" 592568SN/A 608713Sandreas.hansson@arm.com/** 6110405Sandreas.hansson@arm.com * A bridge is used to interface two different crossbars (or in general a 628713Sandreas.hansson@arm.com * memory-mapped master and slave), with buffering for requests and 638713Sandreas.hansson@arm.com * responses. The bridge has a fixed delay for packets passing through 648713Sandreas.hansson@arm.com * it and responds to a fixed set of address ranges. 658713Sandreas.hansson@arm.com * 668713Sandreas.hansson@arm.com * The bridge comprises a slave port and a master port, that buffer 678713Sandreas.hansson@arm.com * outgoing responses and requests respectively. Buffer space is 688713Sandreas.hansson@arm.com * reserved when a request arrives, also reserving response space 699164Sandreas.hansson@arm.com * before forwarding the request. If there is no space present, then 709164Sandreas.hansson@arm.com * the bridge will delay accepting the packet until space becomes 719164Sandreas.hansson@arm.com * available. 728713Sandreas.hansson@arm.com */ 732568SN/Aclass Bridge : public MemObject 742568SN/A{ 752568SN/A protected: 768713Sandreas.hansson@arm.com 778713Sandreas.hansson@arm.com /** 789164Sandreas.hansson@arm.com * A deferred packet stores a packet along with its scheduled 799164Sandreas.hansson@arm.com * transmission time 809029Sandreas.hansson@arm.com */ 819164Sandreas.hansson@arm.com class DeferredPacket 829029Sandreas.hansson@arm.com { 839029Sandreas.hansson@arm.com 849029Sandreas.hansson@arm.com public: 859029Sandreas.hansson@arm.com 869786Sandreas.hansson@arm.com const Tick tick; 879786Sandreas.hansson@arm.com const PacketPtr pkt; 889029Sandreas.hansson@arm.com 899164Sandreas.hansson@arm.com DeferredPacket(PacketPtr _pkt, Tick _tick) : tick(_tick), pkt(_pkt) 909029Sandreas.hansson@arm.com { } 919029Sandreas.hansson@arm.com }; 929029Sandreas.hansson@arm.com 938713Sandreas.hansson@arm.com // Forward declaration to allow the slave port to have a pointer 948713Sandreas.hansson@arm.com class BridgeMasterPort; 958713Sandreas.hansson@arm.com 968713Sandreas.hansson@arm.com /** 978713Sandreas.hansson@arm.com * The port on the side that receives requests and sends 988713Sandreas.hansson@arm.com * responses. The slave port has a set of address ranges that it 998713Sandreas.hansson@arm.com * is responsible for. The slave port also has a buffer for the 1008713Sandreas.hansson@arm.com * responses not yet sent. 1018713Sandreas.hansson@arm.com */ 1028922Swilliam.wang@arm.com class BridgeSlavePort : public SlavePort 1032568SN/A { 1048713Sandreas.hansson@arm.com 1058713Sandreas.hansson@arm.com private: 1068713Sandreas.hansson@arm.com 1079164Sandreas.hansson@arm.com /** The bridge to which this port belongs. */ 1089164Sandreas.hansson@arm.com Bridge& bridge; 1092568SN/A 1102643Sstever@eecs.umich.edu /** 11110405Sandreas.hansson@arm.com * Master port on the other side of the bridge. 1122643Sstever@eecs.umich.edu */ 1138851Sandreas.hansson@arm.com BridgeMasterPort& masterPort; 1148713Sandreas.hansson@arm.com 1158713Sandreas.hansson@arm.com /** Minimum request delay though this bridge. */ 1169786Sandreas.hansson@arm.com const Cycles delay; 1178713Sandreas.hansson@arm.com 1188713Sandreas.hansson@arm.com /** Address ranges to pass through the bridge */ 1199786Sandreas.hansson@arm.com const AddrRangeList ranges; 1208713Sandreas.hansson@arm.com 1218713Sandreas.hansson@arm.com /** 1228713Sandreas.hansson@arm.com * Response packet queue. Response packets are held in this 1238713Sandreas.hansson@arm.com * queue for a specified delay to model the processing delay 1249786Sandreas.hansson@arm.com * of the bridge. We use a deque as we need to iterate over 1259786Sandreas.hansson@arm.com * the items for functional accesses. 1268713Sandreas.hansson@arm.com */ 1279786Sandreas.hansson@arm.com std::deque<DeferredPacket> transmitList; 1288713Sandreas.hansson@arm.com 1298713Sandreas.hansson@arm.com /** Counter to track the outstanding responses. */ 1308713Sandreas.hansson@arm.com unsigned int outstandingResponses; 1318713Sandreas.hansson@arm.com 1329164Sandreas.hansson@arm.com /** If we should send a retry when space becomes available. */ 1339164Sandreas.hansson@arm.com bool retryReq; 1348713Sandreas.hansson@arm.com 1358713Sandreas.hansson@arm.com /** Max queue size for reserved responses. */ 1368713Sandreas.hansson@arm.com unsigned int respQueueLimit; 1378713Sandreas.hansson@arm.com 1388713Sandreas.hansson@arm.com /** 13911192Sandreas.hansson@arm.com * Upstream caches need this packet until true is returned, so 14011192Sandreas.hansson@arm.com * hold it for deletion until a subsequent call 14111192Sandreas.hansson@arm.com */ 14211192Sandreas.hansson@arm.com std::unique_ptr<Packet> pendingDelete; 14311192Sandreas.hansson@arm.com 14411192Sandreas.hansson@arm.com /** 1458713Sandreas.hansson@arm.com * Is this side blocked from accepting new response packets. 1468713Sandreas.hansson@arm.com * 1478713Sandreas.hansson@arm.com * @return true if the reserved space has reached the set limit 1488713Sandreas.hansson@arm.com */ 1499786Sandreas.hansson@arm.com bool respQueueFull() const; 1508713Sandreas.hansson@arm.com 1518713Sandreas.hansson@arm.com /** 1528713Sandreas.hansson@arm.com * Handle send event, scheduled when the packet at the head of 1538713Sandreas.hansson@arm.com * the response queue is ready to transmit (for timing 1548713Sandreas.hansson@arm.com * accesses only). 1558713Sandreas.hansson@arm.com */ 1569164Sandreas.hansson@arm.com void trySendTiming(); 1578713Sandreas.hansson@arm.com 1588713Sandreas.hansson@arm.com /** Send event for the response queue. */ 15912084Sspwilson2@wisc.edu EventFunctionWrapper sendEvent; 1608713Sandreas.hansson@arm.com 1618713Sandreas.hansson@arm.com public: 1628713Sandreas.hansson@arm.com 1638713Sandreas.hansson@arm.com /** 1648713Sandreas.hansson@arm.com * Constructor for the BridgeSlavePort. 1658713Sandreas.hansson@arm.com * 1668713Sandreas.hansson@arm.com * @param _name the port name including the owner 1678713Sandreas.hansson@arm.com * @param _bridge the structural owner 1688713Sandreas.hansson@arm.com * @param _masterPort the master port on the other side of the bridge 1699180Sandreas.hansson@arm.com * @param _delay the delay in cycles from receiving to sending 1708713Sandreas.hansson@arm.com * @param _resp_limit the size of the response queue 1718713Sandreas.hansson@arm.com * @param _ranges a number of address ranges to forward 1728713Sandreas.hansson@arm.com */ 1739164Sandreas.hansson@arm.com BridgeSlavePort(const std::string& _name, Bridge& _bridge, 1749180Sandreas.hansson@arm.com BridgeMasterPort& _masterPort, Cycles _delay, 1759235Sandreas.hansson@arm.com int _resp_limit, std::vector<AddrRange> _ranges); 1768713Sandreas.hansson@arm.com 1778713Sandreas.hansson@arm.com /** 1788713Sandreas.hansson@arm.com * Queue a response packet to be sent out later and also schedule 1798713Sandreas.hansson@arm.com * a send if necessary. 1808713Sandreas.hansson@arm.com * 1818713Sandreas.hansson@arm.com * @param pkt a response to send out after a delay 1829164Sandreas.hansson@arm.com * @param when tick when response packet should be sent 1838713Sandreas.hansson@arm.com */ 1849164Sandreas.hansson@arm.com void schedTimingResp(PacketPtr pkt, Tick when); 1859164Sandreas.hansson@arm.com 1869164Sandreas.hansson@arm.com /** 1879164Sandreas.hansson@arm.com * Retry any stalled request that we have failed to accept at 1889164Sandreas.hansson@arm.com * an earlier point in time. This call will do nothing if no 1899164Sandreas.hansson@arm.com * request is waiting. 1909164Sandreas.hansson@arm.com */ 1919164Sandreas.hansson@arm.com void retryStalledReq(); 1928713Sandreas.hansson@arm.com 1938713Sandreas.hansson@arm.com protected: 1948713Sandreas.hansson@arm.com 1958713Sandreas.hansson@arm.com /** When receiving a timing request from the peer port, 1968713Sandreas.hansson@arm.com pass it to the bridge. */ 1979164Sandreas.hansson@arm.com bool recvTimingReq(PacketPtr pkt); 1988713Sandreas.hansson@arm.com 1998713Sandreas.hansson@arm.com /** When receiving a retry request from the peer port, 2008713Sandreas.hansson@arm.com pass it to the bridge. */ 20110713Sandreas.hansson@arm.com void recvRespRetry(); 2028713Sandreas.hansson@arm.com 2038713Sandreas.hansson@arm.com /** When receiving a Atomic requestfrom the peer port, 2048713Sandreas.hansson@arm.com pass it to the bridge. */ 2059164Sandreas.hansson@arm.com Tick recvAtomic(PacketPtr pkt); 2068713Sandreas.hansson@arm.com 2078713Sandreas.hansson@arm.com /** When receiving a Functional request from the peer port, 2088713Sandreas.hansson@arm.com pass it to the bridge. */ 2099164Sandreas.hansson@arm.com void recvFunctional(PacketPtr pkt); 2108713Sandreas.hansson@arm.com 2118713Sandreas.hansson@arm.com /** When receiving a address range request the peer port, 2128713Sandreas.hansson@arm.com pass it to the bridge. */ 2139164Sandreas.hansson@arm.com AddrRangeList getAddrRanges() const; 2148713Sandreas.hansson@arm.com }; 2158713Sandreas.hansson@arm.com 2168713Sandreas.hansson@arm.com 2178713Sandreas.hansson@arm.com /** 2188713Sandreas.hansson@arm.com * Port on the side that forwards requests and receives 2198713Sandreas.hansson@arm.com * responses. The master port has a buffer for the requests not 2208713Sandreas.hansson@arm.com * yet sent. 2218713Sandreas.hansson@arm.com */ 2228922Swilliam.wang@arm.com class BridgeMasterPort : public MasterPort 2238713Sandreas.hansson@arm.com { 2248713Sandreas.hansson@arm.com 2258713Sandreas.hansson@arm.com private: 2268713Sandreas.hansson@arm.com 2279164Sandreas.hansson@arm.com /** The bridge to which this port belongs. */ 2289164Sandreas.hansson@arm.com Bridge& bridge; 2298713Sandreas.hansson@arm.com 2308713Sandreas.hansson@arm.com /** 23110405Sandreas.hansson@arm.com * The slave port on the other side of the bridge. 2328713Sandreas.hansson@arm.com */ 2338851Sandreas.hansson@arm.com BridgeSlavePort& slavePort; 2342643Sstever@eecs.umich.edu 2352643Sstever@eecs.umich.edu /** Minimum delay though this bridge. */ 2369786Sandreas.hansson@arm.com const Cycles delay; 2372643Sstever@eecs.umich.edu 2388713Sandreas.hansson@arm.com /** 2398713Sandreas.hansson@arm.com * Request packet queue. Request packets are held in this 2408713Sandreas.hansson@arm.com * queue for a specified delay to model the processing delay 2419786Sandreas.hansson@arm.com * of the bridge. We use a deque as we need to iterate over 2429786Sandreas.hansson@arm.com * the items for functional accesses. 2438713Sandreas.hansson@arm.com */ 2449786Sandreas.hansson@arm.com std::deque<DeferredPacket> transmitList; 2454435Ssaidi@eecs.umich.edu 2468713Sandreas.hansson@arm.com /** Max queue size for request packets */ 2479786Sandreas.hansson@arm.com const unsigned int reqQueueLimit; 2484433Ssaidi@eecs.umich.edu 2492643Sstever@eecs.umich.edu /** 2502643Sstever@eecs.umich.edu * Handle send event, scheduled when the packet at the head of 2512643Sstever@eecs.umich.edu * the outbound queue is ready to transmit (for timing 2522643Sstever@eecs.umich.edu * accesses only). 2532643Sstever@eecs.umich.edu */ 2549164Sandreas.hansson@arm.com void trySendTiming(); 2552643Sstever@eecs.umich.edu 2568713Sandreas.hansson@arm.com /** Send event for the request queue. */ 25712084Sspwilson2@wisc.edu EventFunctionWrapper sendEvent; 2582568SN/A 2592568SN/A public: 2608713Sandreas.hansson@arm.com 2618713Sandreas.hansson@arm.com /** 2628713Sandreas.hansson@arm.com * Constructor for the BridgeMasterPort. 2638713Sandreas.hansson@arm.com * 2648713Sandreas.hansson@arm.com * @param _name the port name including the owner 2658713Sandreas.hansson@arm.com * @param _bridge the structural owner 2668713Sandreas.hansson@arm.com * @param _slavePort the slave port on the other side of the bridge 2679180Sandreas.hansson@arm.com * @param _delay the delay in cycles from receiving to sending 2688713Sandreas.hansson@arm.com * @param _req_limit the size of the request queue 2698713Sandreas.hansson@arm.com */ 2709164Sandreas.hansson@arm.com BridgeMasterPort(const std::string& _name, Bridge& _bridge, 2719180Sandreas.hansson@arm.com BridgeSlavePort& _slavePort, Cycles _delay, 2728713Sandreas.hansson@arm.com int _req_limit); 2738713Sandreas.hansson@arm.com 2748713Sandreas.hansson@arm.com /** 2758713Sandreas.hansson@arm.com * Is this side blocked from accepting new request packets. 2768713Sandreas.hansson@arm.com * 2778713Sandreas.hansson@arm.com * @return true if the occupied space has reached the set limit 2788713Sandreas.hansson@arm.com */ 2799786Sandreas.hansson@arm.com bool reqQueueFull() const; 2808713Sandreas.hansson@arm.com 2818713Sandreas.hansson@arm.com /** 2828713Sandreas.hansson@arm.com * Queue a request packet to be sent out later and also schedule 2838713Sandreas.hansson@arm.com * a send if necessary. 2848713Sandreas.hansson@arm.com * 2858713Sandreas.hansson@arm.com * @param pkt a request to send out after a delay 2869164Sandreas.hansson@arm.com * @param when tick when response packet should be sent 2878713Sandreas.hansson@arm.com */ 2889164Sandreas.hansson@arm.com void schedTimingReq(PacketPtr pkt, Tick when); 2898713Sandreas.hansson@arm.com 2908713Sandreas.hansson@arm.com /** 2918713Sandreas.hansson@arm.com * Check a functional request against the packets in our 2928713Sandreas.hansson@arm.com * request queue. 2938713Sandreas.hansson@arm.com * 2948713Sandreas.hansson@arm.com * @param pkt packet to check against 2958713Sandreas.hansson@arm.com * 2968713Sandreas.hansson@arm.com * @return true if we find a match 2978713Sandreas.hansson@arm.com */ 2988713Sandreas.hansson@arm.com bool checkFunctional(PacketPtr pkt); 2992568SN/A 3002568SN/A protected: 3012568SN/A 3022643Sstever@eecs.umich.edu /** When receiving a timing request from the peer port, 3032643Sstever@eecs.umich.edu pass it to the bridge. */ 3049164Sandreas.hansson@arm.com bool recvTimingResp(PacketPtr pkt); 3052568SN/A 3062643Sstever@eecs.umich.edu /** When receiving a retry request from the peer port, 3072568SN/A pass it to the bridge. */ 30810713Sandreas.hansson@arm.com void recvReqRetry(); 3092568SN/A }; 3102568SN/A 3118713Sandreas.hansson@arm.com /** Slave port of the bridge. */ 3128713Sandreas.hansson@arm.com BridgeSlavePort slavePort; 3138713Sandreas.hansson@arm.com 3148713Sandreas.hansson@arm.com /** Master port of the bridge. */ 3158713Sandreas.hansson@arm.com BridgeMasterPort masterPort; 3162568SN/A 3172568SN/A public: 3182568SN/A 3199294Sandreas.hansson@arm.com virtual BaseMasterPort& getMasterPort(const std::string& if_name, 3209294Sandreas.hansson@arm.com PortID idx = InvalidPortID); 3219294Sandreas.hansson@arm.com virtual BaseSlavePort& getSlavePort(const std::string& if_name, 3229294Sandreas.hansson@arm.com PortID idx = InvalidPortID); 3232568SN/A 3242568SN/A virtual void init(); 3252568SN/A 3269164Sandreas.hansson@arm.com typedef BridgeParams Params; 3279164Sandreas.hansson@arm.com 3284435Ssaidi@eecs.umich.edu Bridge(Params *p); 3292568SN/A}; 3302568SN/A 33110405Sandreas.hansson@arm.com#endif //__MEM_BRIDGE_HH__ 332