abstract_mem.cc revision 9203
12391SN/A/*
28931Sandreas.hansson@arm.com * Copyright (c) 2010-2012 ARM Limited
37733SN/A * All rights reserved
47733SN/A *
57733SN/A * The license below extends only to copyright in the software and shall
67733SN/A * not be construed as granting a license to any other intellectual
77733SN/A * property including but not limited to intellectual property relating
87733SN/A * to a hardware implementation of the functionality of the software
97733SN/A * licensed hereunder.  You may use the software subject to the license
107733SN/A * terms below provided that you ensure that this notice is replicated
117733SN/A * unmodified and in its entirety in all distributions of the software,
127733SN/A * modified or unmodified, in source code or in binary form.
137733SN/A *
142391SN/A * Copyright (c) 2001-2005 The Regents of The University of Michigan
152391SN/A * All rights reserved.
162391SN/A *
172391SN/A * Redistribution and use in source and binary forms, with or without
182391SN/A * modification, are permitted provided that the following conditions are
192391SN/A * met: redistributions of source code must retain the above copyright
202391SN/A * notice, this list of conditions and the following disclaimer;
212391SN/A * redistributions in binary form must reproduce the above copyright
222391SN/A * notice, this list of conditions and the following disclaimer in the
232391SN/A * documentation and/or other materials provided with the distribution;
242391SN/A * neither the name of the copyright holders nor the names of its
252391SN/A * contributors may be used to endorse or promote products derived from
262391SN/A * this software without specific prior written permission.
272391SN/A *
282391SN/A * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
292391SN/A * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
302391SN/A * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
312391SN/A * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
322391SN/A * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
332391SN/A * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
342391SN/A * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
352391SN/A * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
362391SN/A * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
372391SN/A * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
382391SN/A * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
392665SN/A *
402665SN/A * Authors: Ron Dreslinski
412914SN/A *          Ali Saidi
428931Sandreas.hansson@arm.com *          Andreas Hansson
432391SN/A */
442391SN/A
458229SN/A#include <sys/mman.h>
462391SN/A#include <sys/types.h>
477730SN/A#include <sys/user.h>
482391SN/A#include <fcntl.h>
492391SN/A#include <unistd.h>
502391SN/A#include <zlib.h>
512391SN/A
528229SN/A#include <cerrno>
536712SN/A#include <cstdio>
549203Smarco.elver@ed.ac.uk#include <climits>
552391SN/A#include <iostream>
562391SN/A#include <string>
572391SN/A
586329SN/A#include "arch/registers.hh"
596658SN/A#include "config/the_isa.hh"
608232SN/A#include "debug/LLSC.hh"
618232SN/A#include "debug/MemoryAccess.hh"
628931Sandreas.hansson@arm.com#include "mem/abstract_mem.hh"
633879SN/A#include "mem/packet_access.hh"
649053Sdam.sunwoo@arm.com#include "sim/system.hh"
652394SN/A
662391SN/Ausing namespace std;
672391SN/A
688931Sandreas.hansson@arm.comAbstractMemory::AbstractMemory(const Params *p) :
698931Sandreas.hansson@arm.com    MemObject(p), range(params()->range), pmemAddr(NULL),
709053Sdam.sunwoo@arm.com    confTableReported(p->conf_table_reported), inAddrMap(p->in_addr_map),
719053Sdam.sunwoo@arm.com    _system(NULL)
722391SN/A{
737730SN/A    if (size() % TheISA::PageBytes != 0)
742391SN/A        panic("Memory Size not divisible by page size\n");
752391SN/A
765477SN/A    if (params()->null)
775477SN/A        return;
785477SN/A
797730SN/A    if (params()->file == "") {
807730SN/A        int map_flags = MAP_ANON | MAP_PRIVATE;
817730SN/A        pmemAddr = (uint8_t *)mmap(NULL, size(),
827730SN/A                                   PROT_READ | PROT_WRITE, map_flags, -1, 0);
837730SN/A    } else {
847730SN/A        int map_flags = MAP_PRIVATE;
857730SN/A        int fd = open(params()->file.c_str(), O_RDONLY);
868931Sandreas.hansson@arm.com        long _size = lseek(fd, 0, SEEK_END);
878931Sandreas.hansson@arm.com        if (_size != range.size()) {
888931Sandreas.hansson@arm.com            warn("Specified size %d does not match file %s %d\n", range.size(),
898931Sandreas.hansson@arm.com                 params()->file, _size);
908931Sandreas.hansson@arm.com            range = RangeSize(range.start, _size);
918931Sandreas.hansson@arm.com        }
927730SN/A        lseek(fd, 0, SEEK_SET);
938931Sandreas.hansson@arm.com        pmemAddr = (uint8_t *)mmap(NULL, roundUp(_size, sysconf(_SC_PAGESIZE)),
947730SN/A                                   PROT_READ | PROT_WRITE, map_flags, fd, 0);
957730SN/A    }
962391SN/A
973012SN/A    if (pmemAddr == (void *)MAP_FAILED) {
982391SN/A        perror("mmap");
997730SN/A        if (params()->file == "")
1007730SN/A            fatal("Could not mmap!\n");
1017730SN/A        else
1027730SN/A            fatal("Could not find file: %s\n", params()->file);
1032391SN/A    }
1042391SN/A
1053751SN/A    //If requested, initialize all the memory to 0
1064762SN/A    if (p->zero)
1077730SN/A        memset(pmemAddr, 0, size());
1082391SN/A}
1092391SN/A
1102541SN/A
1118931Sandreas.hansson@arm.comAbstractMemory::~AbstractMemory()
1122391SN/A{
1133012SN/A    if (pmemAddr)
1147730SN/A        munmap((char*)pmemAddr, size());
1152391SN/A}
1162391SN/A
1178719SN/Avoid
1188931Sandreas.hansson@arm.comAbstractMemory::regStats()
1198719SN/A{
1208719SN/A    using namespace Stats;
1218719SN/A
1229053Sdam.sunwoo@arm.com    assert(system());
1239053Sdam.sunwoo@arm.com
1248719SN/A    bytesRead
1259053Sdam.sunwoo@arm.com        .init(system()->maxMasters())
1268719SN/A        .name(name() + ".bytes_read")
1278719SN/A        .desc("Number of bytes read from this memory")
1289053Sdam.sunwoo@arm.com        .flags(total | nozero | nonan)
1298719SN/A        ;
1309053Sdam.sunwoo@arm.com    for (int i = 0; i < system()->maxMasters(); i++) {
1319053Sdam.sunwoo@arm.com        bytesRead.subname(i, system()->getMasterName(i));
1329053Sdam.sunwoo@arm.com    }
1338719SN/A    bytesInstRead
1349053Sdam.sunwoo@arm.com        .init(system()->maxMasters())
1358719SN/A        .name(name() + ".bytes_inst_read")
1368719SN/A        .desc("Number of instructions bytes read from this memory")
1379053Sdam.sunwoo@arm.com        .flags(total | nozero | nonan)
1388719SN/A        ;
1399053Sdam.sunwoo@arm.com    for (int i = 0; i < system()->maxMasters(); i++) {
1409053Sdam.sunwoo@arm.com        bytesInstRead.subname(i, system()->getMasterName(i));
1419053Sdam.sunwoo@arm.com    }
1428719SN/A    bytesWritten
1439053Sdam.sunwoo@arm.com        .init(system()->maxMasters())
1448719SN/A        .name(name() + ".bytes_written")
1458719SN/A        .desc("Number of bytes written to this memory")
1469053Sdam.sunwoo@arm.com        .flags(total | nozero | nonan)
1478719SN/A        ;
1489053Sdam.sunwoo@arm.com    for (int i = 0; i < system()->maxMasters(); i++) {
1499053Sdam.sunwoo@arm.com        bytesWritten.subname(i, system()->getMasterName(i));
1509053Sdam.sunwoo@arm.com    }
1518719SN/A    numReads
1529053Sdam.sunwoo@arm.com        .init(system()->maxMasters())
1538719SN/A        .name(name() + ".num_reads")
1548719SN/A        .desc("Number of read requests responded to by this memory")
1559053Sdam.sunwoo@arm.com        .flags(total | nozero | nonan)
1568719SN/A        ;
1579053Sdam.sunwoo@arm.com    for (int i = 0; i < system()->maxMasters(); i++) {
1589053Sdam.sunwoo@arm.com        numReads.subname(i, system()->getMasterName(i));
1599053Sdam.sunwoo@arm.com    }
1608719SN/A    numWrites
1619053Sdam.sunwoo@arm.com        .init(system()->maxMasters())
1628719SN/A        .name(name() + ".num_writes")
1638719SN/A        .desc("Number of write requests responded to by this memory")
1649053Sdam.sunwoo@arm.com        .flags(total | nozero | nonan)
1658719SN/A        ;
1669053Sdam.sunwoo@arm.com    for (int i = 0; i < system()->maxMasters(); i++) {
1679053Sdam.sunwoo@arm.com        numWrites.subname(i, system()->getMasterName(i));
1689053Sdam.sunwoo@arm.com    }
1698719SN/A    numOther
1709053Sdam.sunwoo@arm.com        .init(system()->maxMasters())
1718719SN/A        .name(name() + ".num_other")
1728719SN/A        .desc("Number of other requests responded to by this memory")
1739053Sdam.sunwoo@arm.com        .flags(total | nozero | nonan)
1748719SN/A        ;
1759053Sdam.sunwoo@arm.com    for (int i = 0; i < system()->maxMasters(); i++) {
1769053Sdam.sunwoo@arm.com        numOther.subname(i, system()->getMasterName(i));
1779053Sdam.sunwoo@arm.com    }
1788719SN/A    bwRead
1798719SN/A        .name(name() + ".bw_read")
1808719SN/A        .desc("Total read bandwidth from this memory (bytes/s)")
1818719SN/A        .precision(0)
1828719SN/A        .prereq(bytesRead)
1839053Sdam.sunwoo@arm.com        .flags(total | nozero | nonan)
1848719SN/A        ;
1859053Sdam.sunwoo@arm.com    for (int i = 0; i < system()->maxMasters(); i++) {
1869053Sdam.sunwoo@arm.com        bwRead.subname(i, system()->getMasterName(i));
1879053Sdam.sunwoo@arm.com    }
1889053Sdam.sunwoo@arm.com
1898719SN/A    bwInstRead
1908719SN/A        .name(name() + ".bw_inst_read")
1918719SN/A        .desc("Instruction read bandwidth from this memory (bytes/s)")
1928719SN/A        .precision(0)
1938719SN/A        .prereq(bytesInstRead)
1949053Sdam.sunwoo@arm.com        .flags(total | nozero | nonan)
1958719SN/A        ;
1969053Sdam.sunwoo@arm.com    for (int i = 0; i < system()->maxMasters(); i++) {
1979053Sdam.sunwoo@arm.com        bwInstRead.subname(i, system()->getMasterName(i));
1989053Sdam.sunwoo@arm.com    }
1998719SN/A    bwWrite
2008719SN/A        .name(name() + ".bw_write")
2018719SN/A        .desc("Write bandwidth from this memory (bytes/s)")
2028719SN/A        .precision(0)
2038719SN/A        .prereq(bytesWritten)
2049053Sdam.sunwoo@arm.com        .flags(total | nozero | nonan)
2058719SN/A        ;
2069053Sdam.sunwoo@arm.com    for (int i = 0; i < system()->maxMasters(); i++) {
2079053Sdam.sunwoo@arm.com        bwWrite.subname(i, system()->getMasterName(i));
2089053Sdam.sunwoo@arm.com    }
2098719SN/A    bwTotal
2108719SN/A        .name(name() + ".bw_total")
2118719SN/A        .desc("Total bandwidth to/from this memory (bytes/s)")
2128719SN/A        .precision(0)
2138719SN/A        .prereq(bwTotal)
2149053Sdam.sunwoo@arm.com        .flags(total | nozero | nonan)
2158719SN/A        ;
2169053Sdam.sunwoo@arm.com    for (int i = 0; i < system()->maxMasters(); i++) {
2179053Sdam.sunwoo@arm.com        bwTotal.subname(i, system()->getMasterName(i));
2189053Sdam.sunwoo@arm.com    }
2198719SN/A    bwRead = bytesRead / simSeconds;
2208719SN/A    bwInstRead = bytesInstRead / simSeconds;
2218719SN/A    bwWrite = bytesWritten / simSeconds;
2228719SN/A    bwTotal = (bytesRead + bytesWritten) / simSeconds;
2238719SN/A}
2248719SN/A
2258931Sandreas.hansson@arm.comRange<Addr>
2269098Sandreas.hansson@arm.comAbstractMemory::getAddrRange() const
2272408SN/A{
2288931Sandreas.hansson@arm.com    return range;
2292408SN/A}
2302408SN/A
2313170SN/A// Add load-locked to tracking list.  Should only be called if the
2326076SN/A// operation is a load and the LLSC flag is set.
2333170SN/Avoid
2348931Sandreas.hansson@arm.comAbstractMemory::trackLoadLocked(PacketPtr pkt)
2353170SN/A{
2364626SN/A    Request *req = pkt->req;
2373170SN/A    Addr paddr = LockedAddr::mask(req->getPaddr());
2383170SN/A
2393170SN/A    // first we check if we already have a locked addr for this
2403170SN/A    // xc.  Since each xc only gets one, we just update the
2413170SN/A    // existing record with the new address.
2423170SN/A    list<LockedAddr>::iterator i;
2433170SN/A
2443170SN/A    for (i = lockedAddrList.begin(); i != lockedAddrList.end(); ++i) {
2453170SN/A        if (i->matchesContext(req)) {
2465714SN/A            DPRINTF(LLSC, "Modifying lock record: context %d addr %#x\n",
2475714SN/A                    req->contextId(), paddr);
2483170SN/A            i->addr = paddr;
2493170SN/A            return;
2503170SN/A        }
2513170SN/A    }
2523170SN/A
2533170SN/A    // no record for this xc: need to allocate a new one
2545714SN/A    DPRINTF(LLSC, "Adding lock record: context %d addr %#x\n",
2555714SN/A            req->contextId(), paddr);
2563170SN/A    lockedAddrList.push_front(LockedAddr(req));
2573170SN/A}
2583170SN/A
2593170SN/A
2603170SN/A// Called on *writes* only... both regular stores and
2613170SN/A// store-conditional operations.  Check for conventional stores which
2623170SN/A// conflict with locked addresses, and for success/failure of store
2633170SN/A// conditionals.
2643170SN/Abool
2658931Sandreas.hansson@arm.comAbstractMemory::checkLockedAddrList(PacketPtr pkt)
2663170SN/A{
2674626SN/A    Request *req = pkt->req;
2683170SN/A    Addr paddr = LockedAddr::mask(req->getPaddr());
2696102SN/A    bool isLLSC = pkt->isLLSC();
2703170SN/A
2713170SN/A    // Initialize return value.  Non-conditional stores always
2723170SN/A    // succeed.  Assume conditional stores will fail until proven
2733170SN/A    // otherwise.
2749080Smatt.evans@arm.com    bool allowStore = !isLLSC;
2753170SN/A
2769080Smatt.evans@arm.com    // Iterate over list.  Note that there could be multiple matching records,
2779080Smatt.evans@arm.com    // as more than one context could have done a load locked to this location.
2789080Smatt.evans@arm.com    // Only remove records when we succeed in finding a record for (xc, addr);
2799080Smatt.evans@arm.com    // then, remove all records with this address.  Failed store-conditionals do
2809080Smatt.evans@arm.com    // not blow unrelated reservations.
2813170SN/A    list<LockedAddr>::iterator i = lockedAddrList.begin();
2823170SN/A
2839080Smatt.evans@arm.com    if (isLLSC) {
2849080Smatt.evans@arm.com        while (i != lockedAddrList.end()) {
2859080Smatt.evans@arm.com            if (i->addr == paddr && i->matchesContext(req)) {
2869080Smatt.evans@arm.com                // it's a store conditional, and as far as the memory system can
2879080Smatt.evans@arm.com                // tell, the requesting context's lock is still valid.
2885714SN/A                DPRINTF(LLSC, "StCond success: context %d addr %#x\n",
2895714SN/A                        req->contextId(), paddr);
2909080Smatt.evans@arm.com                allowStore = true;
2919080Smatt.evans@arm.com                break;
2923170SN/A            }
2939080Smatt.evans@arm.com            // If we didn't find a match, keep searching!  Someone else may well
2949080Smatt.evans@arm.com            // have a reservation on this line here but we may find ours in just
2959080Smatt.evans@arm.com            // a little while.
2969080Smatt.evans@arm.com            i++;
2973170SN/A        }
2989080Smatt.evans@arm.com        req->setExtraData(allowStore ? 1 : 0);
2999080Smatt.evans@arm.com    }
3009080Smatt.evans@arm.com    // LLSCs that succeeded AND non-LLSC stores both fall into here:
3019080Smatt.evans@arm.com    if (allowStore) {
3029080Smatt.evans@arm.com        // We write address paddr.  However, there may be several entries with a
3039080Smatt.evans@arm.com        // reservation on this address (for other contextIds) and they must all
3049080Smatt.evans@arm.com        // be removed.
3059080Smatt.evans@arm.com        i = lockedAddrList.begin();
3069080Smatt.evans@arm.com        while (i != lockedAddrList.end()) {
3079080Smatt.evans@arm.com            if (i->addr == paddr) {
3089080Smatt.evans@arm.com                DPRINTF(LLSC, "Erasing lock record: context %d addr %#x\n",
3099080Smatt.evans@arm.com                        i->contextId, paddr);
3109080Smatt.evans@arm.com                i = lockedAddrList.erase(i);
3119080Smatt.evans@arm.com            } else {
3129080Smatt.evans@arm.com                i++;
3139080Smatt.evans@arm.com            }
3143170SN/A        }
3153170SN/A    }
3163170SN/A
3179080Smatt.evans@arm.com    return allowStore;
3183170SN/A}
3193170SN/A
3204626SN/A
3214626SN/A#if TRACING_ON
3224626SN/A
3234626SN/A#define CASE(A, T)                                                      \
3244626SN/A  case sizeof(T):                                                       \
3256429SN/A    DPRINTF(MemoryAccess,"%s of size %i on address 0x%x data 0x%x\n",   \
3266429SN/A            A, pkt->getSize(), pkt->getAddr(), pkt->get<T>());          \
3274626SN/A  break
3284626SN/A
3294626SN/A
3304626SN/A#define TRACE_PACKET(A)                                                 \
3314626SN/A    do {                                                                \
3324626SN/A        switch (pkt->getSize()) {                                       \
3334626SN/A          CASE(A, uint64_t);                                            \
3344626SN/A          CASE(A, uint32_t);                                            \
3354626SN/A          CASE(A, uint16_t);                                            \
3364626SN/A          CASE(A, uint8_t);                                             \
3374626SN/A          default:                                                      \
3386429SN/A            DPRINTF(MemoryAccess, "%s of size %i on address 0x%x\n",    \
3396429SN/A                    A, pkt->getSize(), pkt->getAddr());                 \
3408077SN/A            DDUMP(MemoryAccess, pkt->getPtr<uint8_t>(), pkt->getSize());\
3414626SN/A        }                                                               \
3424626SN/A    } while (0)
3434626SN/A
3444626SN/A#else
3454626SN/A
3464626SN/A#define TRACE_PACKET(A)
3474626SN/A
3484626SN/A#endif
3494626SN/A
3508931Sandreas.hansson@arm.comvoid
3518931Sandreas.hansson@arm.comAbstractMemory::access(PacketPtr pkt)
3522413SN/A{
3538931Sandreas.hansson@arm.com    assert(pkt->getAddr() >= range.start &&
3548931Sandreas.hansson@arm.com           (pkt->getAddr() + pkt->getSize() - 1) <= range.end);
3552414SN/A
3564626SN/A    if (pkt->memInhibitAsserted()) {
3574626SN/A        DPRINTF(MemoryAccess, "mem inhibited on 0x%x: not responding\n",
3584626SN/A                pkt->getAddr());
3598931Sandreas.hansson@arm.com        return;
3603175SN/A    }
3614626SN/A
3628931Sandreas.hansson@arm.com    uint8_t *hostAddr = pmemAddr + pkt->getAddr() - range.start;
3634626SN/A
3644626SN/A    if (pkt->cmd == MemCmd::SwapReq) {
3658931Sandreas.hansson@arm.com        TheISA::IntReg overwrite_val;
3664040SN/A        bool overwrite_mem;
3674040SN/A        uint64_t condition_val64;
3684040SN/A        uint32_t condition_val32;
3694040SN/A
3705477SN/A        if (!pmemAddr)
3715477SN/A            panic("Swap only works if there is real memory (i.e. null=False)");
3728931Sandreas.hansson@arm.com        assert(sizeof(TheISA::IntReg) >= pkt->getSize());
3734040SN/A
3744040SN/A        overwrite_mem = true;
3754040SN/A        // keep a copy of our possible write value, and copy what is at the
3764040SN/A        // memory address into the packet
3774052SN/A        std::memcpy(&overwrite_val, pkt->getPtr<uint8_t>(), pkt->getSize());
3784626SN/A        std::memcpy(pkt->getPtr<uint8_t>(), hostAddr, pkt->getSize());
3794040SN/A
3804040SN/A        if (pkt->req->isCondSwap()) {
3814040SN/A            if (pkt->getSize() == sizeof(uint64_t)) {
3824052SN/A                condition_val64 = pkt->req->getExtraData();
3834626SN/A                overwrite_mem = !std::memcmp(&condition_val64, hostAddr,
3844626SN/A                                             sizeof(uint64_t));
3854040SN/A            } else if (pkt->getSize() == sizeof(uint32_t)) {
3864052SN/A                condition_val32 = (uint32_t)pkt->req->getExtraData();
3874626SN/A                overwrite_mem = !std::memcmp(&condition_val32, hostAddr,
3884626SN/A                                             sizeof(uint32_t));
3894040SN/A            } else
3904040SN/A                panic("Invalid size for conditional read/write\n");
3914040SN/A        }
3924040SN/A
3934040SN/A        if (overwrite_mem)
3944626SN/A            std::memcpy(hostAddr, &overwrite_val, pkt->getSize());
3954040SN/A
3966429SN/A        assert(!pkt->req->isInstFetch());
3974626SN/A        TRACE_PACKET("Read/Write");
3989053Sdam.sunwoo@arm.com        numOther[pkt->req->masterId()]++;
3994626SN/A    } else if (pkt->isRead()) {
4004626SN/A        assert(!pkt->isWrite());
4016102SN/A        if (pkt->isLLSC()) {
4024626SN/A            trackLoadLocked(pkt);
4034040SN/A        }
4045477SN/A        if (pmemAddr)
4055477SN/A            memcpy(pkt->getPtr<uint8_t>(), hostAddr, pkt->getSize());
4066429SN/A        TRACE_PACKET(pkt->req->isInstFetch() ? "IFetch" : "Read");
4079053Sdam.sunwoo@arm.com        numReads[pkt->req->masterId()]++;
4089053Sdam.sunwoo@arm.com        bytesRead[pkt->req->masterId()] += pkt->getSize();
4098719SN/A        if (pkt->req->isInstFetch())
4109053Sdam.sunwoo@arm.com            bytesInstRead[pkt->req->masterId()] += pkt->getSize();
4114626SN/A    } else if (pkt->isWrite()) {
4124626SN/A        if (writeOK(pkt)) {
4135477SN/A            if (pmemAddr)
4145477SN/A                memcpy(hostAddr, pkt->getPtr<uint8_t>(), pkt->getSize());
4156429SN/A            assert(!pkt->req->isInstFetch());
4164626SN/A            TRACE_PACKET("Write");
4179053Sdam.sunwoo@arm.com            numWrites[pkt->req->masterId()]++;
4189053Sdam.sunwoo@arm.com            bytesWritten[pkt->req->masterId()] += pkt->getSize();
4194626SN/A        }
4204626SN/A    } else if (pkt->isInvalidate()) {
4218931Sandreas.hansson@arm.com        // no need to do anything
4224040SN/A    } else {
4232413SN/A        panic("unimplemented");
4242413SN/A    }
4252420SN/A
4264626SN/A    if (pkt->needsResponse()) {
4278931Sandreas.hansson@arm.com        pkt->makeResponse();
4284626SN/A    }
4292413SN/A}
4302413SN/A
4318931Sandreas.hansson@arm.comvoid
4328931Sandreas.hansson@arm.comAbstractMemory::functionalAccess(PacketPtr pkt)
4338931Sandreas.hansson@arm.com{
4348931Sandreas.hansson@arm.com    assert(pkt->getAddr() >= range.start &&
4358931Sandreas.hansson@arm.com           (pkt->getAddr() + pkt->getSize() - 1) <= range.end);
4364626SN/A
4378931Sandreas.hansson@arm.com    uint8_t *hostAddr = pmemAddr + pkt->getAddr() - range.start;
4384626SN/A
4395314SN/A    if (pkt->isRead()) {
4405477SN/A        if (pmemAddr)
4415477SN/A            memcpy(pkt->getPtr<uint8_t>(), hostAddr, pkt->getSize());
4424626SN/A        TRACE_PACKET("Read");
4438931Sandreas.hansson@arm.com        pkt->makeResponse();
4445314SN/A    } else if (pkt->isWrite()) {
4455477SN/A        if (pmemAddr)
4465477SN/A            memcpy(hostAddr, pkt->getPtr<uint8_t>(), pkt->getSize());
4474626SN/A        TRACE_PACKET("Write");
4488931Sandreas.hansson@arm.com        pkt->makeResponse();
4495314SN/A    } else if (pkt->isPrint()) {
4505315SN/A        Packet::PrintReqState *prs =
4515315SN/A            dynamic_cast<Packet::PrintReqState*>(pkt->senderState);
4528992SAli.Saidi@ARM.com        assert(prs);
4535315SN/A        // Need to call printLabels() explicitly since we're not going
4545315SN/A        // through printObj().
4555314SN/A        prs->printLabels();
4565315SN/A        // Right now we just print the single byte at the specified address.
4575314SN/A        ccprintf(prs->os, "%s%#x\n", prs->curPrefix(), *hostAddr);
4584626SN/A    } else {
4598931Sandreas.hansson@arm.com        panic("AbstractMemory: unimplemented functional command %s",
4604626SN/A              pkt->cmdString());
4614626SN/A    }
4624490SN/A}
4634490SN/A
4642413SN/Avoid
4658931Sandreas.hansson@arm.comAbstractMemory::serialize(ostream &os)
4662391SN/A{
4675477SN/A    if (!pmemAddr)
4685477SN/A        return;
4695477SN/A
4702391SN/A    gzFile compressedMem;
4712391SN/A    string filename = name() + ".physmem";
4728931Sandreas.hansson@arm.com    long _size = range.size();
4732391SN/A
4742391SN/A    SERIALIZE_SCALAR(filename);
4757730SN/A    SERIALIZE_SCALAR(_size);
4762391SN/A
4772391SN/A    // write memory file
4782391SN/A    string thefile = Checkpoint::dir() + "/" + filename.c_str();
4792391SN/A    int fd = creat(thefile.c_str(), 0664);
4802391SN/A    if (fd < 0) {
4812391SN/A        perror("creat");
4822391SN/A        fatal("Can't open physical memory checkpoint file '%s'\n", filename);
4832391SN/A    }
4842391SN/A
4852391SN/A    compressedMem = gzdopen(fd, "wb");
4862391SN/A    if (compressedMem == NULL)
4872391SN/A        fatal("Insufficient memory to allocate compression state for %s\n",
4882391SN/A                filename);
4892391SN/A
4909203Smarco.elver@ed.ac.uk    uint64_t pass_size = 0;
4919203Smarco.elver@ed.ac.uk    // gzwrite fails if (int)len < 0 (gzwrite returns int)
4929203Smarco.elver@ed.ac.uk    for (uint64_t written = 0; written < size(); written += pass_size) {
4939203Smarco.elver@ed.ac.uk        pass_size = (uint64_t)INT_MAX < (size() - written) ?
4949203Smarco.elver@ed.ac.uk            (uint64_t)INT_MAX : (size() - written);
4959203Smarco.elver@ed.ac.uk
4969203Smarco.elver@ed.ac.uk        if (gzwrite(compressedMem, pmemAddr + written,
4979203Smarco.elver@ed.ac.uk                    (unsigned int) pass_size) != (int)pass_size) {
4989203Smarco.elver@ed.ac.uk            fatal("Write failed on physical memory checkpoint file '%s'\n",
4999203Smarco.elver@ed.ac.uk                  filename);
5009203Smarco.elver@ed.ac.uk        }
5012391SN/A    }
5022391SN/A
5032391SN/A    if (gzclose(compressedMem))
5042391SN/A        fatal("Close failed on physical memory checkpoint file '%s'\n",
5052391SN/A              filename);
5067733SN/A
5077733SN/A    list<LockedAddr>::iterator i = lockedAddrList.begin();
5087733SN/A
5097733SN/A    vector<Addr> lal_addr;
5107733SN/A    vector<int> lal_cid;
5117733SN/A    while (i != lockedAddrList.end()) {
5127733SN/A        lal_addr.push_back(i->addr);
5137733SN/A        lal_cid.push_back(i->contextId);
5147733SN/A        i++;
5157733SN/A    }
5167733SN/A    arrayParamOut(os, "lal_addr", lal_addr);
5177733SN/A    arrayParamOut(os, "lal_cid", lal_cid);
5182391SN/A}
5192391SN/A
5202391SN/Avoid
5218931Sandreas.hansson@arm.comAbstractMemory::unserialize(Checkpoint *cp, const string &section)
5222391SN/A{
5235477SN/A    if (!pmemAddr)
5245477SN/A        return;
5255477SN/A
5262391SN/A    gzFile compressedMem;
5272391SN/A    long *tempPage;
5282391SN/A    long *pmem_current;
5292391SN/A    uint64_t curSize;
5302391SN/A    uint32_t bytesRead;
5316227SN/A    const uint32_t chunkSize = 16384;
5322391SN/A
5332391SN/A    string filename;
5342391SN/A
5352391SN/A    UNSERIALIZE_SCALAR(filename);
5362391SN/A
5372391SN/A    filename = cp->cptDir + "/" + filename;
5382391SN/A
5392391SN/A    // mmap memoryfile
5402391SN/A    int fd = open(filename.c_str(), O_RDONLY);
5412391SN/A    if (fd < 0) {
5422391SN/A        perror("open");
5432391SN/A        fatal("Can't open physical memory checkpoint file '%s'", filename);
5442391SN/A    }
5452391SN/A
5462391SN/A    compressedMem = gzdopen(fd, "rb");
5472391SN/A    if (compressedMem == NULL)
5482391SN/A        fatal("Insufficient memory to allocate compression state for %s\n",
5492391SN/A                filename);
5502391SN/A
5518105SN/A    // unmap file that was mmapped in the constructor
5523012SN/A    // This is done here to make sure that gzip and open don't muck with our
5533012SN/A    // nice large space of memory before we reallocate it
5547730SN/A    munmap((char*)pmemAddr, size());
5552391SN/A
5568931Sandreas.hansson@arm.com    long _size;
5577730SN/A    UNSERIALIZE_SCALAR(_size);
5588931Sandreas.hansson@arm.com    if (_size > params()->range.size())
5598636SN/A        fatal("Memory size has changed! size %lld, param size %lld\n",
5608931Sandreas.hansson@arm.com              _size, params()->range.size());
5617730SN/A
5627730SN/A    pmemAddr = (uint8_t *)mmap(NULL, size(),
5634762SN/A        PROT_READ | PROT_WRITE, MAP_ANON | MAP_PRIVATE, -1, 0);
5642391SN/A
5653012SN/A    if (pmemAddr == (void *)MAP_FAILED) {
5662391SN/A        perror("mmap");
5672391SN/A        fatal("Could not mmap physical memory!\n");
5682391SN/A    }
5692391SN/A
5702391SN/A    curSize = 0;
5712391SN/A    tempPage = (long*)malloc(chunkSize);
5722391SN/A    if (tempPage == NULL)
5732391SN/A        fatal("Unable to malloc memory to read file %s\n", filename);
5742391SN/A
5752391SN/A    /* Only copy bytes that are non-zero, so we don't give the VM system hell */
5767730SN/A    while (curSize < size()) {
5772391SN/A        bytesRead = gzread(compressedMem, tempPage, chunkSize);
5786820SN/A        if (bytesRead == 0)
5796820SN/A            break;
5802391SN/A
5812391SN/A        assert(bytesRead % sizeof(long) == 0);
5822391SN/A
5836227SN/A        for (uint32_t x = 0; x < bytesRead / sizeof(long); x++)
5842391SN/A        {
5852391SN/A             if (*(tempPage+x) != 0) {
5863012SN/A                 pmem_current = (long*)(pmemAddr + curSize + x * sizeof(long));
5872391SN/A                 *pmem_current = *(tempPage+x);
5882391SN/A             }
5892391SN/A        }
5902391SN/A        curSize += bytesRead;
5912391SN/A    }
5922391SN/A
5932391SN/A    free(tempPage);
5942391SN/A
5952391SN/A    if (gzclose(compressedMem))
5962391SN/A        fatal("Close failed on physical memory checkpoint file '%s'\n",
5972391SN/A              filename);
5982391SN/A
5997733SN/A    vector<Addr> lal_addr;
6007733SN/A    vector<int> lal_cid;
6017733SN/A    arrayParamIn(cp, section, "lal_addr", lal_addr);
6027733SN/A    arrayParamIn(cp, section, "lal_cid", lal_cid);
6037733SN/A    for(int i = 0; i < lal_addr.size(); i++)
6047733SN/A        lockedAddrList.push_front(LockedAddr(lal_addr[i], lal_cid[i]));
6052391SN/A}
606