abstract_mem.cc revision 9053
12391SN/A/*
28931Sandreas.hansson@arm.com * Copyright (c) 2010-2012 ARM Limited
37733SN/A * All rights reserved
47733SN/A *
57733SN/A * The license below extends only to copyright in the software and shall
67733SN/A * not be construed as granting a license to any other intellectual
77733SN/A * property including but not limited to intellectual property relating
87733SN/A * to a hardware implementation of the functionality of the software
97733SN/A * licensed hereunder.  You may use the software subject to the license
107733SN/A * terms below provided that you ensure that this notice is replicated
117733SN/A * unmodified and in its entirety in all distributions of the software,
127733SN/A * modified or unmodified, in source code or in binary form.
137733SN/A *
142391SN/A * Copyright (c) 2001-2005 The Regents of The University of Michigan
152391SN/A * All rights reserved.
162391SN/A *
172391SN/A * Redistribution and use in source and binary forms, with or without
182391SN/A * modification, are permitted provided that the following conditions are
192391SN/A * met: redistributions of source code must retain the above copyright
202391SN/A * notice, this list of conditions and the following disclaimer;
212391SN/A * redistributions in binary form must reproduce the above copyright
222391SN/A * notice, this list of conditions and the following disclaimer in the
232391SN/A * documentation and/or other materials provided with the distribution;
242391SN/A * neither the name of the copyright holders nor the names of its
252391SN/A * contributors may be used to endorse or promote products derived from
262391SN/A * this software without specific prior written permission.
272391SN/A *
282391SN/A * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
292391SN/A * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
302391SN/A * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
312391SN/A * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
322391SN/A * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
332391SN/A * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
342391SN/A * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
352391SN/A * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
362391SN/A * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
372391SN/A * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
382391SN/A * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
392665SN/A *
402665SN/A * Authors: Ron Dreslinski
412914SN/A *          Ali Saidi
428931Sandreas.hansson@arm.com *          Andreas Hansson
432391SN/A */
442391SN/A
458229SN/A#include <sys/mman.h>
462391SN/A#include <sys/types.h>
477730SN/A#include <sys/user.h>
482391SN/A#include <fcntl.h>
492391SN/A#include <unistd.h>
502391SN/A#include <zlib.h>
512391SN/A
528229SN/A#include <cerrno>
536712SN/A#include <cstdio>
542391SN/A#include <iostream>
552391SN/A#include <string>
562391SN/A
576329SN/A#include "arch/registers.hh"
586658SN/A#include "config/the_isa.hh"
598232SN/A#include "debug/LLSC.hh"
608232SN/A#include "debug/MemoryAccess.hh"
618931Sandreas.hansson@arm.com#include "mem/abstract_mem.hh"
623879SN/A#include "mem/packet_access.hh"
639053Sdam.sunwoo@arm.com#include "sim/system.hh"
642394SN/A
652391SN/Ausing namespace std;
662391SN/A
678931Sandreas.hansson@arm.comAbstractMemory::AbstractMemory(const Params *p) :
688931Sandreas.hansson@arm.com    MemObject(p), range(params()->range), pmemAddr(NULL),
699053Sdam.sunwoo@arm.com    confTableReported(p->conf_table_reported), inAddrMap(p->in_addr_map),
709053Sdam.sunwoo@arm.com    _system(NULL)
712391SN/A{
727730SN/A    if (size() % TheISA::PageBytes != 0)
732391SN/A        panic("Memory Size not divisible by page size\n");
742391SN/A
755477SN/A    if (params()->null)
765477SN/A        return;
775477SN/A
787730SN/A    if (params()->file == "") {
797730SN/A        int map_flags = MAP_ANON | MAP_PRIVATE;
807730SN/A        pmemAddr = (uint8_t *)mmap(NULL, size(),
817730SN/A                                   PROT_READ | PROT_WRITE, map_flags, -1, 0);
827730SN/A    } else {
837730SN/A        int map_flags = MAP_PRIVATE;
847730SN/A        int fd = open(params()->file.c_str(), O_RDONLY);
858931Sandreas.hansson@arm.com        long _size = lseek(fd, 0, SEEK_END);
868931Sandreas.hansson@arm.com        if (_size != range.size()) {
878931Sandreas.hansson@arm.com            warn("Specified size %d does not match file %s %d\n", range.size(),
888931Sandreas.hansson@arm.com                 params()->file, _size);
898931Sandreas.hansson@arm.com            range = RangeSize(range.start, _size);
908931Sandreas.hansson@arm.com        }
917730SN/A        lseek(fd, 0, SEEK_SET);
928931Sandreas.hansson@arm.com        pmemAddr = (uint8_t *)mmap(NULL, roundUp(_size, sysconf(_SC_PAGESIZE)),
937730SN/A                                   PROT_READ | PROT_WRITE, map_flags, fd, 0);
947730SN/A    }
952391SN/A
963012SN/A    if (pmemAddr == (void *)MAP_FAILED) {
972391SN/A        perror("mmap");
987730SN/A        if (params()->file == "")
997730SN/A            fatal("Could not mmap!\n");
1007730SN/A        else
1017730SN/A            fatal("Could not find file: %s\n", params()->file);
1022391SN/A    }
1032391SN/A
1043751SN/A    //If requested, initialize all the memory to 0
1054762SN/A    if (p->zero)
1067730SN/A        memset(pmemAddr, 0, size());
1072391SN/A}
1082391SN/A
1092541SN/A
1108931Sandreas.hansson@arm.comAbstractMemory::~AbstractMemory()
1112391SN/A{
1123012SN/A    if (pmemAddr)
1137730SN/A        munmap((char*)pmemAddr, size());
1142391SN/A}
1152391SN/A
1168719SN/Avoid
1178931Sandreas.hansson@arm.comAbstractMemory::regStats()
1188719SN/A{
1198719SN/A    using namespace Stats;
1208719SN/A
1219053Sdam.sunwoo@arm.com    assert(system());
1229053Sdam.sunwoo@arm.com
1238719SN/A    bytesRead
1249053Sdam.sunwoo@arm.com        .init(system()->maxMasters())
1258719SN/A        .name(name() + ".bytes_read")
1268719SN/A        .desc("Number of bytes read from this memory")
1279053Sdam.sunwoo@arm.com        .flags(total | nozero | nonan)
1288719SN/A        ;
1299053Sdam.sunwoo@arm.com    for (int i = 0; i < system()->maxMasters(); i++) {
1309053Sdam.sunwoo@arm.com        bytesRead.subname(i, system()->getMasterName(i));
1319053Sdam.sunwoo@arm.com    }
1328719SN/A    bytesInstRead
1339053Sdam.sunwoo@arm.com        .init(system()->maxMasters())
1348719SN/A        .name(name() + ".bytes_inst_read")
1358719SN/A        .desc("Number of instructions bytes read from this memory")
1369053Sdam.sunwoo@arm.com        .flags(total | nozero | nonan)
1378719SN/A        ;
1389053Sdam.sunwoo@arm.com    for (int i = 0; i < system()->maxMasters(); i++) {
1399053Sdam.sunwoo@arm.com        bytesInstRead.subname(i, system()->getMasterName(i));
1409053Sdam.sunwoo@arm.com    }
1418719SN/A    bytesWritten
1429053Sdam.sunwoo@arm.com        .init(system()->maxMasters())
1438719SN/A        .name(name() + ".bytes_written")
1448719SN/A        .desc("Number of bytes written to this memory")
1459053Sdam.sunwoo@arm.com        .flags(total | nozero | nonan)
1468719SN/A        ;
1479053Sdam.sunwoo@arm.com    for (int i = 0; i < system()->maxMasters(); i++) {
1489053Sdam.sunwoo@arm.com        bytesWritten.subname(i, system()->getMasterName(i));
1499053Sdam.sunwoo@arm.com    }
1508719SN/A    numReads
1519053Sdam.sunwoo@arm.com        .init(system()->maxMasters())
1528719SN/A        .name(name() + ".num_reads")
1538719SN/A        .desc("Number of read requests responded to by this memory")
1549053Sdam.sunwoo@arm.com        .flags(total | nozero | nonan)
1558719SN/A        ;
1569053Sdam.sunwoo@arm.com    for (int i = 0; i < system()->maxMasters(); i++) {
1579053Sdam.sunwoo@arm.com        numReads.subname(i, system()->getMasterName(i));
1589053Sdam.sunwoo@arm.com    }
1598719SN/A    numWrites
1609053Sdam.sunwoo@arm.com        .init(system()->maxMasters())
1618719SN/A        .name(name() + ".num_writes")
1628719SN/A        .desc("Number of write requests responded to by this memory")
1639053Sdam.sunwoo@arm.com        .flags(total | nozero | nonan)
1648719SN/A        ;
1659053Sdam.sunwoo@arm.com    for (int i = 0; i < system()->maxMasters(); i++) {
1669053Sdam.sunwoo@arm.com        numWrites.subname(i, system()->getMasterName(i));
1679053Sdam.sunwoo@arm.com    }
1688719SN/A    numOther
1699053Sdam.sunwoo@arm.com        .init(system()->maxMasters())
1708719SN/A        .name(name() + ".num_other")
1718719SN/A        .desc("Number of other requests responded to by this memory")
1729053Sdam.sunwoo@arm.com        .flags(total | nozero | nonan)
1738719SN/A        ;
1749053Sdam.sunwoo@arm.com    for (int i = 0; i < system()->maxMasters(); i++) {
1759053Sdam.sunwoo@arm.com        numOther.subname(i, system()->getMasterName(i));
1769053Sdam.sunwoo@arm.com    }
1778719SN/A    bwRead
1788719SN/A        .name(name() + ".bw_read")
1798719SN/A        .desc("Total read bandwidth from this memory (bytes/s)")
1808719SN/A        .precision(0)
1818719SN/A        .prereq(bytesRead)
1829053Sdam.sunwoo@arm.com        .flags(total | nozero | nonan)
1838719SN/A        ;
1849053Sdam.sunwoo@arm.com    for (int i = 0; i < system()->maxMasters(); i++) {
1859053Sdam.sunwoo@arm.com        bwRead.subname(i, system()->getMasterName(i));
1869053Sdam.sunwoo@arm.com    }
1879053Sdam.sunwoo@arm.com
1888719SN/A    bwInstRead
1898719SN/A        .name(name() + ".bw_inst_read")
1908719SN/A        .desc("Instruction read bandwidth from this memory (bytes/s)")
1918719SN/A        .precision(0)
1928719SN/A        .prereq(bytesInstRead)
1939053Sdam.sunwoo@arm.com        .flags(total | nozero | nonan)
1948719SN/A        ;
1959053Sdam.sunwoo@arm.com    for (int i = 0; i < system()->maxMasters(); i++) {
1969053Sdam.sunwoo@arm.com        bwInstRead.subname(i, system()->getMasterName(i));
1979053Sdam.sunwoo@arm.com    }
1988719SN/A    bwWrite
1998719SN/A        .name(name() + ".bw_write")
2008719SN/A        .desc("Write bandwidth from this memory (bytes/s)")
2018719SN/A        .precision(0)
2028719SN/A        .prereq(bytesWritten)
2039053Sdam.sunwoo@arm.com        .flags(total | nozero | nonan)
2048719SN/A        ;
2059053Sdam.sunwoo@arm.com    for (int i = 0; i < system()->maxMasters(); i++) {
2069053Sdam.sunwoo@arm.com        bwWrite.subname(i, system()->getMasterName(i));
2079053Sdam.sunwoo@arm.com    }
2088719SN/A    bwTotal
2098719SN/A        .name(name() + ".bw_total")
2108719SN/A        .desc("Total bandwidth to/from this memory (bytes/s)")
2118719SN/A        .precision(0)
2128719SN/A        .prereq(bwTotal)
2139053Sdam.sunwoo@arm.com        .flags(total | nozero | nonan)
2148719SN/A        ;
2159053Sdam.sunwoo@arm.com    for (int i = 0; i < system()->maxMasters(); i++) {
2169053Sdam.sunwoo@arm.com        bwTotal.subname(i, system()->getMasterName(i));
2179053Sdam.sunwoo@arm.com    }
2188719SN/A    bwRead = bytesRead / simSeconds;
2198719SN/A    bwInstRead = bytesInstRead / simSeconds;
2208719SN/A    bwWrite = bytesWritten / simSeconds;
2218719SN/A    bwTotal = (bytesRead + bytesWritten) / simSeconds;
2228719SN/A}
2238719SN/A
2248931Sandreas.hansson@arm.comRange<Addr>
2258931Sandreas.hansson@arm.comAbstractMemory::getAddrRange()
2262408SN/A{
2278931Sandreas.hansson@arm.com    return range;
2282408SN/A}
2292408SN/A
2303170SN/A// Add load-locked to tracking list.  Should only be called if the
2316076SN/A// operation is a load and the LLSC flag is set.
2323170SN/Avoid
2338931Sandreas.hansson@arm.comAbstractMemory::trackLoadLocked(PacketPtr pkt)
2343170SN/A{
2354626SN/A    Request *req = pkt->req;
2363170SN/A    Addr paddr = LockedAddr::mask(req->getPaddr());
2373170SN/A
2383170SN/A    // first we check if we already have a locked addr for this
2393170SN/A    // xc.  Since each xc only gets one, we just update the
2403170SN/A    // existing record with the new address.
2413170SN/A    list<LockedAddr>::iterator i;
2423170SN/A
2433170SN/A    for (i = lockedAddrList.begin(); i != lockedAddrList.end(); ++i) {
2443170SN/A        if (i->matchesContext(req)) {
2455714SN/A            DPRINTF(LLSC, "Modifying lock record: context %d addr %#x\n",
2465714SN/A                    req->contextId(), paddr);
2473170SN/A            i->addr = paddr;
2483170SN/A            return;
2493170SN/A        }
2503170SN/A    }
2513170SN/A
2523170SN/A    // no record for this xc: need to allocate a new one
2535714SN/A    DPRINTF(LLSC, "Adding lock record: context %d addr %#x\n",
2545714SN/A            req->contextId(), paddr);
2553170SN/A    lockedAddrList.push_front(LockedAddr(req));
2563170SN/A}
2573170SN/A
2583170SN/A
2593170SN/A// Called on *writes* only... both regular stores and
2603170SN/A// store-conditional operations.  Check for conventional stores which
2613170SN/A// conflict with locked addresses, and for success/failure of store
2623170SN/A// conditionals.
2633170SN/Abool
2648931Sandreas.hansson@arm.comAbstractMemory::checkLockedAddrList(PacketPtr pkt)
2653170SN/A{
2664626SN/A    Request *req = pkt->req;
2673170SN/A    Addr paddr = LockedAddr::mask(req->getPaddr());
2686102SN/A    bool isLLSC = pkt->isLLSC();
2693170SN/A
2703170SN/A    // Initialize return value.  Non-conditional stores always
2713170SN/A    // succeed.  Assume conditional stores will fail until proven
2723170SN/A    // otherwise.
2736102SN/A    bool success = !isLLSC;
2743170SN/A
2753170SN/A    // Iterate over list.  Note that there could be multiple matching
2763170SN/A    // records, as more than one context could have done a load locked
2773170SN/A    // to this location.
2783170SN/A    list<LockedAddr>::iterator i = lockedAddrList.begin();
2793170SN/A
2803170SN/A    while (i != lockedAddrList.end()) {
2813170SN/A
2823170SN/A        if (i->addr == paddr) {
2833170SN/A            // we have a matching address
2843170SN/A
2856102SN/A            if (isLLSC && i->matchesContext(req)) {
2863170SN/A                // it's a store conditional, and as far as the memory
2873170SN/A                // system can tell, the requesting context's lock is
2883170SN/A                // still valid.
2895714SN/A                DPRINTF(LLSC, "StCond success: context %d addr %#x\n",
2905714SN/A                        req->contextId(), paddr);
2913170SN/A                success = true;
2923170SN/A            }
2933170SN/A
2943170SN/A            // Get rid of our record of this lock and advance to next
2955714SN/A            DPRINTF(LLSC, "Erasing lock record: context %d addr %#x\n",
2965714SN/A                    i->contextId, paddr);
2973170SN/A            i = lockedAddrList.erase(i);
2983170SN/A        }
2993170SN/A        else {
3003170SN/A            // no match: advance to next record
3013170SN/A            ++i;
3023170SN/A        }
3033170SN/A    }
3043170SN/A
3056102SN/A    if (isLLSC) {
3064040SN/A        req->setExtraData(success ? 1 : 0);
3073170SN/A    }
3083170SN/A
3093170SN/A    return success;
3103170SN/A}
3113170SN/A
3124626SN/A
3134626SN/A#if TRACING_ON
3144626SN/A
3154626SN/A#define CASE(A, T)                                                      \
3164626SN/A  case sizeof(T):                                                       \
3176429SN/A    DPRINTF(MemoryAccess,"%s of size %i on address 0x%x data 0x%x\n",   \
3186429SN/A            A, pkt->getSize(), pkt->getAddr(), pkt->get<T>());          \
3194626SN/A  break
3204626SN/A
3214626SN/A
3224626SN/A#define TRACE_PACKET(A)                                                 \
3234626SN/A    do {                                                                \
3244626SN/A        switch (pkt->getSize()) {                                       \
3254626SN/A          CASE(A, uint64_t);                                            \
3264626SN/A          CASE(A, uint32_t);                                            \
3274626SN/A          CASE(A, uint16_t);                                            \
3284626SN/A          CASE(A, uint8_t);                                             \
3294626SN/A          default:                                                      \
3306429SN/A            DPRINTF(MemoryAccess, "%s of size %i on address 0x%x\n",    \
3316429SN/A                    A, pkt->getSize(), pkt->getAddr());                 \
3328077SN/A            DDUMP(MemoryAccess, pkt->getPtr<uint8_t>(), pkt->getSize());\
3334626SN/A        }                                                               \
3344626SN/A    } while (0)
3354626SN/A
3364626SN/A#else
3374626SN/A
3384626SN/A#define TRACE_PACKET(A)
3394626SN/A
3404626SN/A#endif
3414626SN/A
3428931Sandreas.hansson@arm.comvoid
3438931Sandreas.hansson@arm.comAbstractMemory::access(PacketPtr pkt)
3442413SN/A{
3458931Sandreas.hansson@arm.com    assert(pkt->getAddr() >= range.start &&
3468931Sandreas.hansson@arm.com           (pkt->getAddr() + pkt->getSize() - 1) <= range.end);
3472414SN/A
3484626SN/A    if (pkt->memInhibitAsserted()) {
3494626SN/A        DPRINTF(MemoryAccess, "mem inhibited on 0x%x: not responding\n",
3504626SN/A                pkt->getAddr());
3518931Sandreas.hansson@arm.com        return;
3523175SN/A    }
3534626SN/A
3548931Sandreas.hansson@arm.com    uint8_t *hostAddr = pmemAddr + pkt->getAddr() - range.start;
3554626SN/A
3564626SN/A    if (pkt->cmd == MemCmd::SwapReq) {
3578931Sandreas.hansson@arm.com        TheISA::IntReg overwrite_val;
3584040SN/A        bool overwrite_mem;
3594040SN/A        uint64_t condition_val64;
3604040SN/A        uint32_t condition_val32;
3614040SN/A
3625477SN/A        if (!pmemAddr)
3635477SN/A            panic("Swap only works if there is real memory (i.e. null=False)");
3648931Sandreas.hansson@arm.com        assert(sizeof(TheISA::IntReg) >= pkt->getSize());
3654040SN/A
3664040SN/A        overwrite_mem = true;
3674040SN/A        // keep a copy of our possible write value, and copy what is at the
3684040SN/A        // memory address into the packet
3694052SN/A        std::memcpy(&overwrite_val, pkt->getPtr<uint8_t>(), pkt->getSize());
3704626SN/A        std::memcpy(pkt->getPtr<uint8_t>(), hostAddr, pkt->getSize());
3714040SN/A
3724040SN/A        if (pkt->req->isCondSwap()) {
3734040SN/A            if (pkt->getSize() == sizeof(uint64_t)) {
3744052SN/A                condition_val64 = pkt->req->getExtraData();
3754626SN/A                overwrite_mem = !std::memcmp(&condition_val64, hostAddr,
3764626SN/A                                             sizeof(uint64_t));
3774040SN/A            } else if (pkt->getSize() == sizeof(uint32_t)) {
3784052SN/A                condition_val32 = (uint32_t)pkt->req->getExtraData();
3794626SN/A                overwrite_mem = !std::memcmp(&condition_val32, hostAddr,
3804626SN/A                                             sizeof(uint32_t));
3814040SN/A            } else
3824040SN/A                panic("Invalid size for conditional read/write\n");
3834040SN/A        }
3844040SN/A
3854040SN/A        if (overwrite_mem)
3864626SN/A            std::memcpy(hostAddr, &overwrite_val, pkt->getSize());
3874040SN/A
3886429SN/A        assert(!pkt->req->isInstFetch());
3894626SN/A        TRACE_PACKET("Read/Write");
3909053Sdam.sunwoo@arm.com        numOther[pkt->req->masterId()]++;
3914626SN/A    } else if (pkt->isRead()) {
3924626SN/A        assert(!pkt->isWrite());
3936102SN/A        if (pkt->isLLSC()) {
3944626SN/A            trackLoadLocked(pkt);
3954040SN/A        }
3965477SN/A        if (pmemAddr)
3975477SN/A            memcpy(pkt->getPtr<uint8_t>(), hostAddr, pkt->getSize());
3986429SN/A        TRACE_PACKET(pkt->req->isInstFetch() ? "IFetch" : "Read");
3999053Sdam.sunwoo@arm.com        numReads[pkt->req->masterId()]++;
4009053Sdam.sunwoo@arm.com        bytesRead[pkt->req->masterId()] += pkt->getSize();
4018719SN/A        if (pkt->req->isInstFetch())
4029053Sdam.sunwoo@arm.com            bytesInstRead[pkt->req->masterId()] += pkt->getSize();
4034626SN/A    } else if (pkt->isWrite()) {
4044626SN/A        if (writeOK(pkt)) {
4055477SN/A            if (pmemAddr)
4065477SN/A                memcpy(hostAddr, pkt->getPtr<uint8_t>(), pkt->getSize());
4076429SN/A            assert(!pkt->req->isInstFetch());
4084626SN/A            TRACE_PACKET("Write");
4099053Sdam.sunwoo@arm.com            numWrites[pkt->req->masterId()]++;
4109053Sdam.sunwoo@arm.com            bytesWritten[pkt->req->masterId()] += pkt->getSize();
4114626SN/A        }
4124626SN/A    } else if (pkt->isInvalidate()) {
4138931Sandreas.hansson@arm.com        // no need to do anything
4144040SN/A    } else {
4152413SN/A        panic("unimplemented");
4162413SN/A    }
4172420SN/A
4184626SN/A    if (pkt->needsResponse()) {
4198931Sandreas.hansson@arm.com        pkt->makeResponse();
4204626SN/A    }
4212413SN/A}
4222413SN/A
4238931Sandreas.hansson@arm.comvoid
4248931Sandreas.hansson@arm.comAbstractMemory::functionalAccess(PacketPtr pkt)
4258931Sandreas.hansson@arm.com{
4268931Sandreas.hansson@arm.com    assert(pkt->getAddr() >= range.start &&
4278931Sandreas.hansson@arm.com           (pkt->getAddr() + pkt->getSize() - 1) <= range.end);
4284626SN/A
4298931Sandreas.hansson@arm.com    uint8_t *hostAddr = pmemAddr + pkt->getAddr() - range.start;
4304626SN/A
4315314SN/A    if (pkt->isRead()) {
4325477SN/A        if (pmemAddr)
4335477SN/A            memcpy(pkt->getPtr<uint8_t>(), hostAddr, pkt->getSize());
4344626SN/A        TRACE_PACKET("Read");
4358931Sandreas.hansson@arm.com        pkt->makeResponse();
4365314SN/A    } else if (pkt->isWrite()) {
4375477SN/A        if (pmemAddr)
4385477SN/A            memcpy(hostAddr, pkt->getPtr<uint8_t>(), pkt->getSize());
4394626SN/A        TRACE_PACKET("Write");
4408931Sandreas.hansson@arm.com        pkt->makeResponse();
4415314SN/A    } else if (pkt->isPrint()) {
4425315SN/A        Packet::PrintReqState *prs =
4435315SN/A            dynamic_cast<Packet::PrintReqState*>(pkt->senderState);
4448992SAli.Saidi@ARM.com        assert(prs);
4455315SN/A        // Need to call printLabels() explicitly since we're not going
4465315SN/A        // through printObj().
4475314SN/A        prs->printLabels();
4485315SN/A        // Right now we just print the single byte at the specified address.
4495314SN/A        ccprintf(prs->os, "%s%#x\n", prs->curPrefix(), *hostAddr);
4504626SN/A    } else {
4518931Sandreas.hansson@arm.com        panic("AbstractMemory: unimplemented functional command %s",
4524626SN/A              pkt->cmdString());
4534626SN/A    }
4544490SN/A}
4554490SN/A
4562413SN/Avoid
4578931Sandreas.hansson@arm.comAbstractMemory::serialize(ostream &os)
4582391SN/A{
4595477SN/A    if (!pmemAddr)
4605477SN/A        return;
4615477SN/A
4622391SN/A    gzFile compressedMem;
4632391SN/A    string filename = name() + ".physmem";
4648931Sandreas.hansson@arm.com    long _size = range.size();
4652391SN/A
4662391SN/A    SERIALIZE_SCALAR(filename);
4677730SN/A    SERIALIZE_SCALAR(_size);
4682391SN/A
4692391SN/A    // write memory file
4702391SN/A    string thefile = Checkpoint::dir() + "/" + filename.c_str();
4712391SN/A    int fd = creat(thefile.c_str(), 0664);
4722391SN/A    if (fd < 0) {
4732391SN/A        perror("creat");
4742391SN/A        fatal("Can't open physical memory checkpoint file '%s'\n", filename);
4752391SN/A    }
4762391SN/A
4772391SN/A    compressedMem = gzdopen(fd, "wb");
4782391SN/A    if (compressedMem == NULL)
4792391SN/A        fatal("Insufficient memory to allocate compression state for %s\n",
4802391SN/A                filename);
4812391SN/A
4827730SN/A    if (gzwrite(compressedMem, pmemAddr, size()) != (int)size()) {
4832391SN/A        fatal("Write failed on physical memory checkpoint file '%s'\n",
4842391SN/A              filename);
4852391SN/A    }
4862391SN/A
4872391SN/A    if (gzclose(compressedMem))
4882391SN/A        fatal("Close failed on physical memory checkpoint file '%s'\n",
4892391SN/A              filename);
4907733SN/A
4917733SN/A    list<LockedAddr>::iterator i = lockedAddrList.begin();
4927733SN/A
4937733SN/A    vector<Addr> lal_addr;
4947733SN/A    vector<int> lal_cid;
4957733SN/A    while (i != lockedAddrList.end()) {
4967733SN/A        lal_addr.push_back(i->addr);
4977733SN/A        lal_cid.push_back(i->contextId);
4987733SN/A        i++;
4997733SN/A    }
5007733SN/A    arrayParamOut(os, "lal_addr", lal_addr);
5017733SN/A    arrayParamOut(os, "lal_cid", lal_cid);
5022391SN/A}
5032391SN/A
5042391SN/Avoid
5058931Sandreas.hansson@arm.comAbstractMemory::unserialize(Checkpoint *cp, const string &section)
5062391SN/A{
5075477SN/A    if (!pmemAddr)
5085477SN/A        return;
5095477SN/A
5102391SN/A    gzFile compressedMem;
5112391SN/A    long *tempPage;
5122391SN/A    long *pmem_current;
5132391SN/A    uint64_t curSize;
5142391SN/A    uint32_t bytesRead;
5156227SN/A    const uint32_t chunkSize = 16384;
5162391SN/A
5172391SN/A    string filename;
5182391SN/A
5192391SN/A    UNSERIALIZE_SCALAR(filename);
5202391SN/A
5212391SN/A    filename = cp->cptDir + "/" + filename;
5222391SN/A
5232391SN/A    // mmap memoryfile
5242391SN/A    int fd = open(filename.c_str(), O_RDONLY);
5252391SN/A    if (fd < 0) {
5262391SN/A        perror("open");
5272391SN/A        fatal("Can't open physical memory checkpoint file '%s'", filename);
5282391SN/A    }
5292391SN/A
5302391SN/A    compressedMem = gzdopen(fd, "rb");
5312391SN/A    if (compressedMem == NULL)
5322391SN/A        fatal("Insufficient memory to allocate compression state for %s\n",
5332391SN/A                filename);
5342391SN/A
5358105SN/A    // unmap file that was mmapped in the constructor
5363012SN/A    // This is done here to make sure that gzip and open don't muck with our
5373012SN/A    // nice large space of memory before we reallocate it
5387730SN/A    munmap((char*)pmemAddr, size());
5392391SN/A
5408931Sandreas.hansson@arm.com    long _size;
5417730SN/A    UNSERIALIZE_SCALAR(_size);
5428931Sandreas.hansson@arm.com    if (_size > params()->range.size())
5438636SN/A        fatal("Memory size has changed! size %lld, param size %lld\n",
5448931Sandreas.hansson@arm.com              _size, params()->range.size());
5457730SN/A
5467730SN/A    pmemAddr = (uint8_t *)mmap(NULL, size(),
5474762SN/A        PROT_READ | PROT_WRITE, MAP_ANON | MAP_PRIVATE, -1, 0);
5482391SN/A
5493012SN/A    if (pmemAddr == (void *)MAP_FAILED) {
5502391SN/A        perror("mmap");
5512391SN/A        fatal("Could not mmap physical memory!\n");
5522391SN/A    }
5532391SN/A
5542391SN/A    curSize = 0;
5552391SN/A    tempPage = (long*)malloc(chunkSize);
5562391SN/A    if (tempPage == NULL)
5572391SN/A        fatal("Unable to malloc memory to read file %s\n", filename);
5582391SN/A
5592391SN/A    /* Only copy bytes that are non-zero, so we don't give the VM system hell */
5607730SN/A    while (curSize < size()) {
5612391SN/A        bytesRead = gzread(compressedMem, tempPage, chunkSize);
5626820SN/A        if (bytesRead == 0)
5636820SN/A            break;
5642391SN/A
5652391SN/A        assert(bytesRead % sizeof(long) == 0);
5662391SN/A
5676227SN/A        for (uint32_t x = 0; x < bytesRead / sizeof(long); x++)
5682391SN/A        {
5692391SN/A             if (*(tempPage+x) != 0) {
5703012SN/A                 pmem_current = (long*)(pmemAddr + curSize + x * sizeof(long));
5712391SN/A                 *pmem_current = *(tempPage+x);
5722391SN/A             }
5732391SN/A        }
5742391SN/A        curSize += bytesRead;
5752391SN/A    }
5762391SN/A
5772391SN/A    free(tempPage);
5782391SN/A
5792391SN/A    if (gzclose(compressedMem))
5802391SN/A        fatal("Close failed on physical memory checkpoint file '%s'\n",
5812391SN/A              filename);
5822391SN/A
5837733SN/A    vector<Addr> lal_addr;
5847733SN/A    vector<int> lal_cid;
5857733SN/A    arrayParamIn(cp, section, "lal_addr", lal_addr);
5867733SN/A    arrayParamIn(cp, section, "lal_cid", lal_cid);
5877733SN/A    for(int i = 0; i < lal_addr.size(); i++)
5887733SN/A        lockedAddrList.push_front(LockedAddr(lal_addr[i], lal_cid[i]));
5892391SN/A}
590