SConscript revision 12966
12SN/A# -*- mode:python -*- 21762SN/A# 32SN/A# Copyright (c) 2018 ARM Limited 42SN/A# All rights reserved 52SN/A# 62SN/A# The license below extends only to copyright in the software and shall 72SN/A# not be construed as granting a license to any other intellectual 82SN/A# property including but not limited to intellectual property relating 92SN/A# to a hardware implementation of the functionality of the software 102SN/A# licensed hereunder. You may use the software subject to the license 112SN/A# terms below provided that you ensure that this notice is replicated 122SN/A# unmodified and in its entirety in all distributions of the software, 132SN/A# modified or unmodified, in source code or in binary form. 142SN/A# 152SN/A# Copyright (c) 2006 The Regents of The University of Michigan 162SN/A# All rights reserved. 172SN/A# 182SN/A# Redistribution and use in source and binary forms, with or without 192SN/A# modification, are permitted provided that the following conditions are 202SN/A# met: redistributions of source code must retain the above copyright 212SN/A# notice, this list of conditions and the following disclaimer; 222SN/A# redistributions in binary form must reproduce the above copyright 232SN/A# notice, this list of conditions and the following disclaimer in the 242SN/A# documentation and/or other materials provided with the distribution; 252SN/A# neither the name of the copyright holders nor the names of its 262SN/A# contributors may be used to endorse or promote products derived from 272665Ssaidi@eecs.umich.edu# this software without specific prior written permission. 282760Sbinkertn@umich.edu# 292760Sbinkertn@umich.edu# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 302665Ssaidi@eecs.umich.edu# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 312SN/A# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 322SN/A# A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 332SN/A# OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 34363SN/A# SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 35363SN/A# LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 361354SN/A# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 372SN/A# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 382SN/A# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 392SN/A# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 402SN/A# 412SN/A# Authors: Nathan Binkert 422SN/A 43363SN/AImport('*') 4456SN/A 451388SN/ASimObject('CommMonitor.py') 46217SN/ASource('comm_monitor.cc') 47363SN/A 4856SN/ASimObject('AbstractMemory.py') 4956SN/ASimObject('AddrMapper.py') 5056SN/ASimObject('Bridge.py') 511638SN/ASimObject('DRAMCtrl.py') 5256SN/ASimObject('ExternalMaster.py') 532SN/ASimObject('ExternalSlave.py') 542356SN/ASimObject('MemObject.py') 552356SN/ASimObject('SimpleMemory.py') 562356SN/ASimObject('XBar.py') 572SN/ASimObject('HMCController.py') 582SN/ASimObject('SerialLink.py') 594000Ssaidi@eecs.umich.eduSimObject('MemDelay.py') 604000Ssaidi@eecs.umich.edu 614762Snate@binkert.orgSource('abstract_mem.cc') 624762Snate@binkert.orgSource('addr_mapper.cc') 634762Snate@binkert.orgSource('bridge.cc') 644762Snate@binkert.orgSource('coherent_xbar.cc') 654762Snate@binkert.orgSource('drampower.cc') 664762Snate@binkert.orgSource('dram_ctrl.cc') 674762Snate@binkert.orgSource('external_master.cc') 684762Snate@binkert.orgSource('external_slave.cc') 694762Snate@binkert.orgSource('mem_object.cc') 704762Snate@binkert.orgSource('mport.cc') 714762Snate@binkert.orgSource('noncoherent_xbar.cc') 724762Snate@binkert.orgSource('packet.cc') 734762Snate@binkert.orgSource('port.cc') 744762Snate@binkert.orgSource('packet_queue.cc') 754762Snate@binkert.orgSource('port_proxy.cc') 764762Snate@binkert.orgSource('physical.cc') 774762Snate@binkert.orgSource('simple_mem.cc') 784762Snate@binkert.orgSource('snoop_filter.cc') 794762Snate@binkert.orgSource('stack_dist_calc.cc') 804762Snate@binkert.orgSource('tport.cc') 814762Snate@binkert.orgSource('xbar.cc') 824762Snate@binkert.orgSource('hmc_controller.cc') 834762Snate@binkert.orgSource('serial_link.cc') 844762Snate@binkert.orgSource('mem_delay.cc') 854762Snate@binkert.org 864762Snate@binkert.orgif env['TARGET_ISA'] != 'null': 874762Snate@binkert.org Source('fs_translating_port_proxy.cc') 884762Snate@binkert.org Source('se_translating_port_proxy.cc') 894762Snate@binkert.org Source('page_table.cc') 904762Snate@binkert.org 914762Snate@binkert.orgif env['HAVE_DRAMSIM']: 924762Snate@binkert.org SimObject('DRAMSim2.py') 934762Snate@binkert.org Source('dramsim2_wrapper.cc') 944762Snate@binkert.org Source('dramsim2.cc') 954762Snate@binkert.org 964762Snate@binkert.orgSimObject('MemChecker.py') 974762Snate@binkert.orgSource('mem_checker.cc') 984762Snate@binkert.orgSource('mem_checker_monitor.cc') 994762Snate@binkert.org 1004762Snate@binkert.orgDebugFlag('AddrRanges') 1014762Snate@binkert.orgDebugFlag('BaseXBar') 1024762Snate@binkert.orgDebugFlag('CoherentXBar') 1034762Snate@binkert.orgDebugFlag('NoncoherentXBar') 1044762Snate@binkert.orgDebugFlag('SnoopFilter') 1054762Snate@binkert.orgCompoundFlag('XBar', ['BaseXBar', 'CoherentXBar', 'NoncoherentXBar', 1064762Snate@binkert.org 'SnoopFilter']) 1074762Snate@binkert.org 1084762Snate@binkert.orgDebugFlag('Bridge') 1094762Snate@binkert.orgDebugFlag('CommMonitor') 1104762Snate@binkert.orgDebugFlag('DRAM') 1114762Snate@binkert.orgDebugFlag('DRAMPower') 1124762Snate@binkert.orgDebugFlag('DRAMState') 1134762Snate@binkert.orgDebugFlag('ExternalPort') 1144762Snate@binkert.orgDebugFlag('LLSC') 1154762Snate@binkert.orgDebugFlag('MMU') 1164762Snate@binkert.orgDebugFlag('MemoryAccess') 1174762Snate@binkert.orgDebugFlag('PacketQueue') 1184762Snate@binkert.orgDebugFlag('StackDist') 1194762Snate@binkert.orgDebugFlag("DRAMSim2") 1204762Snate@binkert.orgDebugFlag('HMCController') 1214762Snate@binkert.orgDebugFlag('SerialLink') 1224762Snate@binkert.org 1234762Snate@binkert.orgDebugFlag("MemChecker") 1244762Snate@binkert.orgDebugFlag("MemCheckerMonitor") 1254762Snate@binkert.orgDebugFlag("QOS") 1264762Snate@binkert.org