SConscript revision 10208:c249f7660eb7
12SN/A# -*- mode:python -*-
21762SN/A
32SN/A# Copyright (c) 2006 The Regents of The University of Michigan
42SN/A# All rights reserved.
52SN/A#
62SN/A# Redistribution and use in source and binary forms, with or without
72SN/A# modification, are permitted provided that the following conditions are
82SN/A# met: redistributions of source code must retain the above copyright
92SN/A# notice, this list of conditions and the following disclaimer;
102SN/A# redistributions in binary form must reproduce the above copyright
112SN/A# notice, this list of conditions and the following disclaimer in the
122SN/A# documentation and/or other materials provided with the distribution;
132SN/A# neither the name of the copyright holders nor the names of its
142SN/A# contributors may be used to endorse or promote products derived from
152SN/A# this software without specific prior written permission.
162SN/A#
172SN/A# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
182SN/A# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
192SN/A# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
202SN/A# A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
212SN/A# OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
222SN/A# SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
232SN/A# LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
242SN/A# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
252SN/A# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
262SN/A# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
272665Ssaidi@eecs.umich.edu# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
282665Ssaidi@eecs.umich.edu#
292665Ssaidi@eecs.umich.edu# Authors: Nathan Binkert
302SN/A
312SN/AImport('*')
322SN/A
332SN/A# Only build the communication if we have support for protobuf as the
342SN/A# tracing relies on it
352520SN/Aif env['HAVE_PROTOBUF']:
362207SN/A    SimObject('CommMonitor.py')
372207SN/A    Source('comm_monitor.cc')
385543Ssaidi@eecs.umich.edu
392SN/ASimObject('AbstractMemory.py')
402519SN/ASimObject('AddrMapper.py')
412SN/ASimObject('Bridge.py')
422SN/ASimObject('Bus.py')
432SN/ASimObject('DRAMCtrl.py')
442SN/ASimObject('MemObject.py')
45360SN/ASimObject('SimpleMemory.py')
46360SN/A
47360SN/ASource('abstract_mem.cc')
48360SN/ASource('addr_mapper.cc')
492207SN/ASource('bridge.cc')
504111Sgblack@eecs.umich.eduSource('bus.cc')
514111Sgblack@eecs.umich.eduSource('coherent_bus.cc')
524155Sgblack@eecs.umich.eduSource('dram_ctrl.cc')
535335Shines@cs.fsu.eduSource('mem_object.cc')
545335Shines@cs.fsu.eduSource('mport.cc')
55360SN/ASource('noncoherent_bus.cc')
56360SN/ASource('packet.cc')
57360SN/ASource('port.cc')
58360SN/ASource('packet_queue.cc')
59360SN/ASource('tport.cc')
602207SN/ASource('port_proxy.cc')
612207SN/ASource('simple_mem.cc')
62360SN/ASource('physical.cc')
63360SN/A
642SN/Aif env['TARGET_ISA'] != 'null':
6512SN/A    Source('fs_translating_port_proxy.cc')
662SN/A    Source('se_translating_port_proxy.cc')
6712SN/A    Source('page_table.cc')
682SN/A
692SN/Aif env['HAVE_DRAMSIM']:
70360SN/A    SimObject('DRAMSim2.py')
71360SN/A    Source('dramsim2_wrapper.cc')
72360SN/A    Source('dramsim2.cc')
7312SN/A
74360SN/ADebugFlag('BaseBus')
75360SN/ADebugFlag('BusAddrRanges')
7612SN/ADebugFlag('CoherentBus')
772SN/ADebugFlag('NoncoherentBus')
782SN/ACompoundFlag('Bus', ['BaseBus', 'BusAddrRanges', 'CoherentBus',
792SN/A                     'NoncoherentBus'])
802SN/A
812SN/ADebugFlag('Bridge')
822520SN/ADebugFlag('CommMonitor')
832520SN/ADebugFlag('DRAM')
843812Ssaidi@eecs.umich.eduDebugFlag('DRAMState')
853812Ssaidi@eecs.umich.eduDebugFlag('LLSC')
863812Ssaidi@eecs.umich.eduDebugFlag('MMU')
873812Ssaidi@eecs.umich.eduDebugFlag('MemoryAccess')
882SN/ADebugFlag('PacketQueue')
895070Ssaidi@eecs.umich.edu
905070Ssaidi@eecs.umich.eduDebugFlag("DRAMSim2")
913917Ssaidi@eecs.umich.edu