SConscript revision 11185
14202Sbinkertn@umich.edu# -*- mode:python -*-
24202Sbinkertn@umich.edu
34202Sbinkertn@umich.edu# Copyright (c) 2006 The Regents of The University of Michigan
44202Sbinkertn@umich.edu# All rights reserved.
54202Sbinkertn@umich.edu#
64202Sbinkertn@umich.edu# Redistribution and use in source and binary forms, with or without
74202Sbinkertn@umich.edu# modification, are permitted provided that the following conditions are
84202Sbinkertn@umich.edu# met: redistributions of source code must retain the above copyright
94202Sbinkertn@umich.edu# notice, this list of conditions and the following disclaimer;
104202Sbinkertn@umich.edu# redistributions in binary form must reproduce the above copyright
114202Sbinkertn@umich.edu# notice, this list of conditions and the following disclaimer in the
124202Sbinkertn@umich.edu# documentation and/or other materials provided with the distribution;
134202Sbinkertn@umich.edu# neither the name of the copyright holders nor the names of its
144202Sbinkertn@umich.edu# contributors may be used to endorse or promote products derived from
154202Sbinkertn@umich.edu# this software without specific prior written permission.
164202Sbinkertn@umich.edu#
174202Sbinkertn@umich.edu# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
184202Sbinkertn@umich.edu# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
194202Sbinkertn@umich.edu# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
204202Sbinkertn@umich.edu# A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
214202Sbinkertn@umich.edu# OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
224202Sbinkertn@umich.edu# SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
234202Sbinkertn@umich.edu# LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
244202Sbinkertn@umich.edu# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
254202Sbinkertn@umich.edu# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
264202Sbinkertn@umich.edu# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
274202Sbinkertn@umich.edu# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
284202Sbinkertn@umich.edu#
294202Sbinkertn@umich.edu# Authors: Nathan Binkert
304202Sbinkertn@umich.edu
314202Sbinkertn@umich.eduImport('*')
324202Sbinkertn@umich.edu
3310996Sandreas.sandberg@arm.comSimObject('CommMonitor.py')
3410996Sandreas.sandberg@arm.comSource('comm_monitor.cc')
359398Sandreas.hansson@arm.com
369850Sandreas.hansson@arm.comSimObject('AbstractMemory.py')
379259SAli.Saidi@ARM.comSimObject('AddrMapper.py')
384486Sbinkertn@umich.eduSimObject('Bridge.py')
3910146Sandreas.hansson@arm.comSimObject('DRAMCtrl.py')
4010478SAndrew.Bardsley@arm.comSimObject('ExternalMaster.py')
4110478SAndrew.Bardsley@arm.comSimObject('ExternalSlave.py')
426165Ssanchezd@stanford.eduSimObject('MemObject.py')
439850Sandreas.hansson@arm.comSimObject('SimpleMemory.py')
4410405Sandreas.hansson@arm.comSimObject('XBar.py')
4511184Serfan.azarkhish@unibo.itSimObject('HMCController.py')
4611185Serfan.azarkhish@unibo.itSimObject('SerialLink.py')
476168Snate@binkert.org
489850Sandreas.hansson@arm.comSource('abstract_mem.cc')
499259SAli.Saidi@ARM.comSource('addr_mapper.cc')
504202Sbinkertn@umich.eduSource('bridge.cc')
5110405Sandreas.hansson@arm.comSource('coherent_xbar.cc')
5210431SOmar.Naji@arm.comSource('drampower.cc')
5310146Sandreas.hansson@arm.comSource('dram_ctrl.cc')
5410478SAndrew.Bardsley@arm.comSource('external_master.cc')
5510478SAndrew.Bardsley@arm.comSource('external_slave.cc')
564202Sbinkertn@umich.eduSource('mem_object.cc')
578761Sgblack@eecs.umich.eduSource('mport.cc')
5810405Sandreas.hansson@arm.comSource('noncoherent_xbar.cc')
594202Sbinkertn@umich.eduSource('packet.cc')
604202Sbinkertn@umich.eduSource('port.cc')
618914Sandreas.hansson@arm.comSource('packet_queue.cc')
6210405Sandreas.hansson@arm.comSource('port_proxy.cc')
6310405Sandreas.hansson@arm.comSource('physical.cc')
6410405Sandreas.hansson@arm.comSource('simple_mem.cc')
6510405Sandreas.hansson@arm.comSource('snoop_filter.cc')
6610614Skanishk.sugand@arm.comSource('stack_dist_calc.cc')
674202Sbinkertn@umich.eduSource('tport.cc')
6810405Sandreas.hansson@arm.comSource('xbar.cc')
6911184Serfan.azarkhish@unibo.itSource('hmc_controller.cc')
7011185Serfan.azarkhish@unibo.itSource('serial_link.cc')
716168Snate@binkert.org
729850Sandreas.hansson@arm.comif env['TARGET_ISA'] != 'null':
739850Sandreas.hansson@arm.com    Source('fs_translating_port_proxy.cc')
749850Sandreas.hansson@arm.com    Source('se_translating_port_proxy.cc')
758763Sgblack@eecs.umich.edu    Source('page_table.cc')
7610299Salexandru.dutu@amd.comif env['TARGET_ISA'] == 'x86':
7710299Salexandru.dutu@amd.com    Source('multi_level_page_table.cc')
787768SAli.Saidi@ARM.com
7910131Sandreas.hansson@arm.comif env['HAVE_DRAMSIM']:
8010131Sandreas.hansson@arm.com    SimObject('DRAMSim2.py')
8110131Sandreas.hansson@arm.com    Source('dramsim2_wrapper.cc')
8210131Sandreas.hansson@arm.com    Source('dramsim2.cc')
8310066Sandreas.hansson@arm.com
8410612SMarco.Elver@ARM.comSimObject('MemChecker.py')
8510612SMarco.Elver@ARM.comSource('mem_checker.cc')
8610612SMarco.Elver@ARM.comSource('mem_checker_monitor.cc')
8710612SMarco.Elver@ARM.com
8810405Sandreas.hansson@arm.comDebugFlag('AddrRanges')
8910405Sandreas.hansson@arm.comDebugFlag('BaseXBar')
9010405Sandreas.hansson@arm.comDebugFlag('CoherentXBar')
9110405Sandreas.hansson@arm.comDebugFlag('NoncoherentXBar')
9210399Sstephan.diestelhorst@arm.comDebugFlag('SnoopFilter')
9310405Sandreas.hansson@arm.comCompoundFlag('XBar', ['BaseXBar', 'CoherentXBar', 'NoncoherentXBar',
9410405Sandreas.hansson@arm.com                      'SnoopFilter'])
959036Sandreas.hansson@arm.com
969164Sandreas.hansson@arm.comDebugFlag('Bridge')
978981Sandreas.hansson@arm.comDebugFlag('CommMonitor')
989243Sandreas.hansson@arm.comDebugFlag('DRAM')
9910247Sandreas.hansson@arm.comDebugFlag('DRAMPower')
10010208Sandreas.hansson@arm.comDebugFlag('DRAMState')
10110478SAndrew.Bardsley@arm.comDebugFlag('ExternalPort')
1028335Snate@binkert.orgDebugFlag('LLSC')
1038335Snate@binkert.orgDebugFlag('MMU')
1048335Snate@binkert.orgDebugFlag('MemoryAccess')
1058914Sandreas.hansson@arm.comDebugFlag('PacketQueue')
10610614Skanishk.sugand@arm.comDebugFlag('StackDist')
10710066Sandreas.hansson@arm.comDebugFlag("DRAMSim2")
10811184Serfan.azarkhish@unibo.itDebugFlag('HMCController')
10911185Serfan.azarkhish@unibo.itDebugFlag('SerialLink')
11010612SMarco.Elver@ARM.com
11110612SMarco.Elver@ARM.comDebugFlag("MemChecker")
11210612SMarco.Elver@ARM.comDebugFlag("MemCheckerMonitor")
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