SConscript revision 10614 
14202Sbinkertn@umich.edu# -*- mode:python -*-
24202Sbinkertn@umich.edu
34202Sbinkertn@umich.edu# Copyright (c) 2006 The Regents of The University of Michigan
44202Sbinkertn@umich.edu# All rights reserved.
54202Sbinkertn@umich.edu#
64202Sbinkertn@umich.edu# Redistribution and use in source and binary forms, with or without
74202Sbinkertn@umich.edu# modification, are permitted provided that the following conditions are
84202Sbinkertn@umich.edu# met: redistributions of source code must retain the above copyright
94202Sbinkertn@umich.edu# notice, this list of conditions and the following disclaimer;
104202Sbinkertn@umich.edu# redistributions in binary form must reproduce the above copyright
114202Sbinkertn@umich.edu# notice, this list of conditions and the following disclaimer in the
124202Sbinkertn@umich.edu# documentation and/or other materials provided with the distribution;
134202Sbinkertn@umich.edu# neither the name of the copyright holders nor the names of its
144202Sbinkertn@umich.edu# contributors may be used to endorse or promote products derived from
154202Sbinkertn@umich.edu# this software without specific prior written permission.
164202Sbinkertn@umich.edu#
174202Sbinkertn@umich.edu# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
184202Sbinkertn@umich.edu# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
194202Sbinkertn@umich.edu# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
204202Sbinkertn@umich.edu# A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
214202Sbinkertn@umich.edu# OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
224202Sbinkertn@umich.edu# SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
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264202Sbinkertn@umich.edu# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
274202Sbinkertn@umich.edu# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
284202Sbinkertn@umich.edu#
294202Sbinkertn@umich.edu# Authors: Nathan Binkert
304202Sbinkertn@umich.edu
314202Sbinkertn@umich.eduImport('*')
324202Sbinkertn@umich.edu
339398Sandreas.hansson@arm.com# Only build the communication if we have support for protobuf as the
349398Sandreas.hansson@arm.com# tracing relies on it
359398Sandreas.hansson@arm.comif env['HAVE_PROTOBUF']:
369398Sandreas.hansson@arm.com    SimObject('CommMonitor.py')
379398Sandreas.hansson@arm.com    Source('comm_monitor.cc')
389398Sandreas.hansson@arm.com
399850Sandreas.hansson@arm.comSimObject('AbstractMemory.py')
409259SAli.Saidi@ARM.comSimObject('AddrMapper.py')
414486Sbinkertn@umich.eduSimObject('Bridge.py')
424486Sbinkertn@umich.eduSimObject('DRAMCtrl.py')
4310146Sandreas.hansson@arm.comSimObject('ExternalMaster.py')
446165Ssanchezd@stanford.eduSimObject('ExternalSlave.py')
459850Sandreas.hansson@arm.comSimObject('MemObject.py')
466168Snate@binkert.orgSimObject('SimpleMemory.py')
479850Sandreas.hansson@arm.comSimObject('StackDistCalc.py')
489259SAli.Saidi@ARM.comSimObject('XBar.py')
494202Sbinkertn@umich.edu
504202Sbinkertn@umich.eduSource('abstract_mem.cc')
519036Sandreas.hansson@arm.comSource('addr_mapper.cc')
5210146Sandreas.hansson@arm.comSource('bridge.cc')
534202Sbinkertn@umich.eduSource('coherent_xbar.cc')
548761Sgblack@eecs.umich.eduSource('drampower.cc')
559036Sandreas.hansson@arm.comSource('dram_ctrl.cc')
564202Sbinkertn@umich.eduSource('external_master.cc')
574202Sbinkertn@umich.eduSource('external_slave.cc')
588914Sandreas.hansson@arm.comSource('mem_object.cc')
594202Sbinkertn@umich.eduSource('mport.cc')
608853Sandreas.hansson@arm.comSource('noncoherent_xbar.cc')
619850Sandreas.hansson@arm.comSource('packet.cc')
629850Sandreas.hansson@arm.comSource('port.cc')
636168Snate@binkert.orgSource('packet_queue.cc')
649850Sandreas.hansson@arm.comSource('port_proxy.cc')
659850Sandreas.hansson@arm.comSource('physical.cc')
669850Sandreas.hansson@arm.comSource('simple_mem.cc')
678763Sgblack@eecs.umich.eduSource('snoop_filter.cc')
6810299Salexandru.dutu@amd.comSource('stack_dist_calc.cc')
6910299Salexandru.dutu@amd.comSource('tport.cc')
707768SAli.Saidi@ARM.comSource('xbar.cc')
7110131Sandreas.hansson@arm.com
7210131Sandreas.hansson@arm.comif env['TARGET_ISA'] != 'null':
7310131Sandreas.hansson@arm.com    Source('fs_translating_port_proxy.cc')
7410131Sandreas.hansson@arm.com    Source('se_translating_port_proxy.cc')
7510066Sandreas.hansson@arm.com    Source('page_table.cc')
769036Sandreas.hansson@arm.comif env['TARGET_ISA'] == 'x86':
778335Snate@binkert.org    Source('multi_level_page_table.cc')
789036Sandreas.hansson@arm.com
799036Sandreas.hansson@arm.comif env['HAVE_DRAMSIM']:
809036Sandreas.hansson@arm.com    SimObject('DRAMSim2.py')
819036Sandreas.hansson@arm.com    Source('dramsim2_wrapper.cc')
829036Sandreas.hansson@arm.com    Source('dramsim2.cc')
839164Sandreas.hansson@arm.com
848981Sandreas.hansson@arm.comSimObject('MemChecker.py')
859243Sandreas.hansson@arm.comSource('mem_checker.cc')
8610247Sandreas.hansson@arm.comSource('mem_checker_monitor.cc')
8710208Sandreas.hansson@arm.com
888335Snate@binkert.orgDebugFlag('AddrRanges')
898335Snate@binkert.orgDebugFlag('BaseXBar')
908335Snate@binkert.orgDebugFlag('CoherentXBar')
918914Sandreas.hansson@arm.comDebugFlag('NoncoherentXBar')
927780Snilay@cs.wisc.eduDebugFlag('SnoopFilter')
9310066Sandreas.hansson@arm.comCompoundFlag('XBar', ['BaseXBar', 'CoherentXBar', 'NoncoherentXBar',
94                      'SnoopFilter'])
95
96DebugFlag('Bridge')
97DebugFlag('CommMonitor')
98DebugFlag('DRAM')
99DebugFlag('DRAMPower')
100DebugFlag('DRAMState')
101DebugFlag('ExternalPort')
102DebugFlag('LLSC')
103DebugFlag('MMU')
104DebugFlag('MemoryAccess')
105DebugFlag('PacketQueue')
106DebugFlag('StackDist')
107DebugFlag("DRAMSim2")
108
109DebugFlag("MemChecker")
110DebugFlag("MemCheckerMonitor")
111