xref: /gem5/src/mem/MemChecker.py

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# Authors: Marco Elver

from m5.SimObject import SimObject
from m5.params import *
from m5.proxy import *

class MemChecker(SimObject):
    type = 'MemChecker'
    cxx_header = "mem/mem_checker.hh"

class MemCheckerMonitor(SimObject):
    type = 'MemCheckerMonitor'
    cxx_header = "mem/mem_checker_monitor.hh"

    # one port in each direction
    master = MasterPort("Master port")
    slave = SlavePort("Slave port")
    cpu_side = SlavePort("Alias for slave")
    mem_side = MasterPort("Alias for master")
    warn_only = Param.Bool(False, "Warn about violations only")
    memchecker = Param.MemChecker("Instance shared with other monitors")