SimpleMemobj.py revision 14252:1659a606447f
12568SN/A# -*- coding: utf-8 -*- 28668Sgeoffrey.blake@arm.com# Copyright (c) 2017 Jason Lowe-Power 38668Sgeoffrey.blake@arm.com# All rights reserved. 48668Sgeoffrey.blake@arm.com# 58668Sgeoffrey.blake@arm.com# Redistribution and use in source and binary forms, with or without 68668Sgeoffrey.blake@arm.com# modification, are permitted provided that the following conditions are 78668Sgeoffrey.blake@arm.com# met: redistributions of source code must retain the above copyright 88668Sgeoffrey.blake@arm.com# notice, this list of conditions and the following disclaimer; 98668Sgeoffrey.blake@arm.com# redistributions in binary form must reproduce the above copyright 108668Sgeoffrey.blake@arm.com# notice, this list of conditions and the following disclaimer in the 118668Sgeoffrey.blake@arm.com# documentation and/or other materials provided with the distribution; 128668Sgeoffrey.blake@arm.com# neither the name of the copyright holders nor the names of its 138668Sgeoffrey.blake@arm.com# contributors may be used to endorse or promote products derived from 142568SN/A# this software without specific prior written permission. 157636Ssteve.reinhardt@amd.com# 162568SN/A# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 172568SN/A# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 182568SN/A# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 192568SN/A# A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 202568SN/A# OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 212568SN/A# SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 222568SN/A# LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 232568SN/A# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 242568SN/A# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 252568SN/A# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 262568SN/A# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 272568SN/A# 282568SN/A# Authors: Jason Lowe-Power 292568SN/A 302568SN/Afrom m5.params import * 312568SN/Afrom m5.SimObject import SimObject 322568SN/A 332568SN/Aclass SimpleMemobj(SimObject): 342568SN/A type = 'SimpleMemobj' 352568SN/A cxx_header = "learning_gem5/part2/simple_memobj.hh" 362568SN/A 372568SN/A inst_port = SlavePort("CPU side port, receives requests") 382568SN/A data_port = SlavePort("CPU side port, receives requests") 392568SN/A mem_side = MasterPort("Memory side port, sends requests") 402665Ssaidi@eecs.umich.edu