system_events.cc revision 2680:246e7104f744
110139Sandreas.hansson@arm.com/*
210139Sandreas.hansson@arm.com * Copyright (c) 2004-2005 The Regents of The University of Michigan
310139Sandreas.hansson@arm.com * All rights reserved.
410139Sandreas.hansson@arm.com *
510139Sandreas.hansson@arm.com * Redistribution and use in source and binary forms, with or without
610139Sandreas.hansson@arm.com * modification, are permitted provided that the following conditions are
710139Sandreas.hansson@arm.com * met: redistributions of source code must retain the above copyright
810139Sandreas.hansson@arm.com * notice, this list of conditions and the following disclaimer;
910139Sandreas.hansson@arm.com * redistributions in binary form must reproduce the above copyright
1010139Sandreas.hansson@arm.com * notice, this list of conditions and the following disclaimer in the
1110139Sandreas.hansson@arm.com * documentation and/or other materials provided with the distribution;
1210139Sandreas.hansson@arm.com * neither the name of the copyright holders nor the names of its
1310139Sandreas.hansson@arm.com * contributors may be used to endorse or promote products derived from
1410139Sandreas.hansson@arm.com * this software without specific prior written permission.
1510139Sandreas.hansson@arm.com *
1610139Sandreas.hansson@arm.com * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
1710139Sandreas.hansson@arm.com * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
1810139Sandreas.hansson@arm.com * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
1910139Sandreas.hansson@arm.com * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
2010139Sandreas.hansson@arm.com * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
2110139Sandreas.hansson@arm.com * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
2210139Sandreas.hansson@arm.com * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
2310139Sandreas.hansson@arm.com * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
2410139Sandreas.hansson@arm.com * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
2510139Sandreas.hansson@arm.com * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
2610139Sandreas.hansson@arm.com * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
2710139Sandreas.hansson@arm.com *
2810139Sandreas.hansson@arm.com * Authors: Lisa Hsu
2910139Sandreas.hansson@arm.com *          Nathan Binkert
3010139Sandreas.hansson@arm.com */
3110139Sandreas.hansson@arm.com
3210139Sandreas.hansson@arm.com#include "cpu/base.hh"
3310139Sandreas.hansson@arm.com#include "cpu/cpu_exec_context.hh"
3410139Sandreas.hansson@arm.com#include "kern/kernel_stats.hh"
3510139Sandreas.hansson@arm.com#include "kern/system_events.hh"
3610139Sandreas.hansson@arm.com#include "sim/system.hh"
3710139Sandreas.hansson@arm.com
3810139Sandreas.hansson@arm.comusing namespace TheISA;
3910139Sandreas.hansson@arm.com
4010139Sandreas.hansson@arm.comvoid
4110139Sandreas.hansson@arm.comSkipFuncEvent::process(ThreadContext *tc)
4210139Sandreas.hansson@arm.com{
4310139Sandreas.hansson@arm.com    Addr newpc = tc->readIntReg(ReturnAddressReg);
4410139Sandreas.hansson@arm.com
4510139Sandreas.hansson@arm.com    DPRINTF(PCEvent, "skipping %s: pc=%x, newpc=%x\n", description,
4610139Sandreas.hansson@arm.com            tc->readPC(), newpc);
4710139Sandreas.hansson@arm.com
4810139Sandreas.hansson@arm.com    tc->setPC(newpc);
4910139Sandreas.hansson@arm.com    tc->setNextPC(tc->readPC() + sizeof(TheISA::MachInst));
5010139Sandreas.hansson@arm.com/*
5110139Sandreas.hansson@arm.com    BranchPred *bp = tc->getCpuPtr()->getBranchPred();
5210139Sandreas.hansson@arm.com    if (bp != NULL) {
5310139Sandreas.hansson@arm.com        bp->popRAS(tc->getThreadNum());
5410139Sandreas.hansson@arm.com    }
5510139Sandreas.hansson@arm.com*/
5610139Sandreas.hansson@arm.com}
5710139Sandreas.hansson@arm.com
5810139Sandreas.hansson@arm.com
5910139Sandreas.hansson@arm.comFnEvent::FnEvent(PCEventQueue *q, const std::string &desc, Addr addr,
6010139Sandreas.hansson@arm.com                 Stats::MainBin *bin)
6110139Sandreas.hansson@arm.com    : PCEvent(q, desc, addr), _name(desc), mybin(bin)
6210139Sandreas.hansson@arm.com{
6310139Sandreas.hansson@arm.com}
6410139Sandreas.hansson@arm.com
6510139Sandreas.hansson@arm.comvoid
6610139Sandreas.hansson@arm.comFnEvent::process(ThreadContext *tc)
6710139Sandreas.hansson@arm.com{
6810139Sandreas.hansson@arm.com    if (tc->misspeculating())
6910139Sandreas.hansson@arm.com        return;
7010139Sandreas.hansson@arm.com
7110139Sandreas.hansson@arm.com    tc->getSystemPtr()->kernelBinning->call(tc, mybin);
7210139Sandreas.hansson@arm.com}
7310139Sandreas.hansson@arm.com
7410139Sandreas.hansson@arm.comvoid
7510139Sandreas.hansson@arm.comIdleStartEvent::process(ThreadContext *tc)
7610139Sandreas.hansson@arm.com{
7710139Sandreas.hansson@arm.com    if (tc->getKernelStats())
7810139Sandreas.hansson@arm.com        tc->getKernelStats()->setIdleProcess(
7910139Sandreas.hansson@arm.com            tc->readMiscReg(AlphaISA::IPR_PALtemp23), tc);
8010139Sandreas.hansson@arm.com    remove();
8110139Sandreas.hansson@arm.com}
8210139Sandreas.hansson@arm.com
8310139Sandreas.hansson@arm.comvoid
8410139Sandreas.hansson@arm.comInterruptStartEvent::process(ThreadContext *tc)
8510139Sandreas.hansson@arm.com{
8610139Sandreas.hansson@arm.com    if (tc->getKernelStats())
8710139Sandreas.hansson@arm.com        tc->getKernelStats()->mode(Kernel::interrupt, tc);
8810139Sandreas.hansson@arm.com}
8910146Sandreas.hansson@arm.com
9010146Sandreas.hansson@arm.comvoid
9110139Sandreas.hansson@arm.comInterruptEndEvent::process(ThreadContext *tc)
9210139Sandreas.hansson@arm.com{
9310139Sandreas.hansson@arm.com    // We go back to kernel, if we are user, inside the rti
9410139Sandreas.hansson@arm.com    // pal code we will get switched to user because of the ICM write
9510139Sandreas.hansson@arm.com    if (tc->getKernelStats())
9610139Sandreas.hansson@arm.com        tc->getKernelStats()->mode(Kernel::kernel, tc);
9710139Sandreas.hansson@arm.com}
9810139Sandreas.hansson@arm.com