system_events.cc revision 3549
1720SN/A/*
21762SN/A * Copyright (c) 2004-2005 The Regents of The University of Michigan
3720SN/A * All rights reserved.
4720SN/A *
5720SN/A * Redistribution and use in source and binary forms, with or without
6720SN/A * modification, are permitted provided that the following conditions are
7720SN/A * met: redistributions of source code must retain the above copyright
8720SN/A * notice, this list of conditions and the following disclaimer;
9720SN/A * redistributions in binary form must reproduce the above copyright
10720SN/A * notice, this list of conditions and the following disclaimer in the
11720SN/A * documentation and/or other materials provided with the distribution;
12720SN/A * neither the name of the copyright holders nor the names of its
13720SN/A * contributors may be used to endorse or promote products derived from
14720SN/A * this software without specific prior written permission.
15720SN/A *
16720SN/A * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
17720SN/A * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
18720SN/A * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
19720SN/A * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
20720SN/A * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
21720SN/A * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
22720SN/A * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23720SN/A * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24720SN/A * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25720SN/A * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
26720SN/A * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
272665Ssaidi@eecs.umich.edu *
282665Ssaidi@eecs.umich.edu * Authors: Lisa Hsu
292665Ssaidi@eecs.umich.edu *          Nathan Binkert
30720SN/A */
31720SN/A
323549Sgblack@eecs.umich.edu#include "base/trace.hh"
332683Sktlim@umich.edu#include "cpu/thread_context.hh"
342518SN/A#include "kern/system_events.hh"
35720SN/A
362107SN/Ausing namespace TheISA;
372107SN/A
38720SN/Avoid
392680Sktlim@umich.eduSkipFuncEvent::process(ThreadContext *tc)
40720SN/A{
412680Sktlim@umich.edu    Addr newpc = tc->readIntReg(ReturnAddressReg);
42720SN/A
43720SN/A    DPRINTF(PCEvent, "skipping %s: pc=%x, newpc=%x\n", description,
442680Sktlim@umich.edu            tc->readPC(), newpc);
45720SN/A
462680Sktlim@umich.edu    tc->setPC(newpc);
472680Sktlim@umich.edu    tc->setNextPC(tc->readPC() + sizeof(TheISA::MachInst));
48720SN/A}
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