system_events.cc revision 2683
1720SN/A/*
21762SN/A * Copyright (c) 2004-2005 The Regents of The University of Michigan
3720SN/A * All rights reserved.
4720SN/A *
5720SN/A * Redistribution and use in source and binary forms, with or without
6720SN/A * modification, are permitted provided that the following conditions are
7720SN/A * met: redistributions of source code must retain the above copyright
8720SN/A * notice, this list of conditions and the following disclaimer;
9720SN/A * redistributions in binary form must reproduce the above copyright
10720SN/A * notice, this list of conditions and the following disclaimer in the
11720SN/A * documentation and/or other materials provided with the distribution;
12720SN/A * neither the name of the copyright holders nor the names of its
13720SN/A * contributors may be used to endorse or promote products derived from
14720SN/A * this software without specific prior written permission.
15720SN/A *
16720SN/A * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
17720SN/A * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
18720SN/A * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
19720SN/A * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
20720SN/A * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
21720SN/A * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
22720SN/A * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23720SN/A * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24720SN/A * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25720SN/A * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
26720SN/A * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
272665Ssaidi@eecs.umich.edu *
282665Ssaidi@eecs.umich.edu * Authors: Lisa Hsu
292665Ssaidi@eecs.umich.edu *          Nathan Binkert
30720SN/A */
31720SN/A
322518SN/A#include "cpu/base.hh"
332683Sktlim@umich.edu#include "cpu/thread_context.hh"
341070SN/A#include "kern/kernel_stats.hh"
352518SN/A#include "kern/system_events.hh"
362518SN/A#include "sim/system.hh"
37720SN/A
382107SN/Ausing namespace TheISA;
392107SN/A
40720SN/Avoid
412680Sktlim@umich.eduSkipFuncEvent::process(ThreadContext *tc)
42720SN/A{
432680Sktlim@umich.edu    Addr newpc = tc->readIntReg(ReturnAddressReg);
44720SN/A
45720SN/A    DPRINTF(PCEvent, "skipping %s: pc=%x, newpc=%x\n", description,
462680Sktlim@umich.edu            tc->readPC(), newpc);
47720SN/A
482680Sktlim@umich.edu    tc->setPC(newpc);
492680Sktlim@umich.edu    tc->setNextPC(tc->readPC() + sizeof(TheISA::MachInst));
502518SN/A/*
512680Sktlim@umich.edu    BranchPred *bp = tc->getCpuPtr()->getBranchPred();
52720SN/A    if (bp != NULL) {
532680Sktlim@umich.edu        bp->popRAS(tc->getThreadNum());
54720SN/A    }
552518SN/A*/
56720SN/A}
57720SN/A
58720SN/A
591885SN/AFnEvent::FnEvent(PCEventQueue *q, const std::string &desc, Addr addr,
601885SN/A                 Stats::MainBin *bin)
611885SN/A    : PCEvent(q, desc, addr), _name(desc), mybin(bin)
62720SN/A{
63720SN/A}
64720SN/A
65720SN/Avoid
662680Sktlim@umich.eduFnEvent::process(ThreadContext *tc)
67720SN/A{
682680Sktlim@umich.edu    if (tc->misspeculating())
69720SN/A        return;
70720SN/A
712680Sktlim@umich.edu    tc->getSystemPtr()->kernelBinning->call(tc, mybin);
721070SN/A}
73720SN/A
741070SN/Avoid
752680Sktlim@umich.eduIdleStartEvent::process(ThreadContext *tc)
761070SN/A{
772680Sktlim@umich.edu    if (tc->getKernelStats())
782680Sktlim@umich.edu        tc->getKernelStats()->setIdleProcess(
792680Sktlim@umich.edu            tc->readMiscReg(AlphaISA::IPR_PALtemp23), tc);
801096SN/A    remove();
81720SN/A}
821082SN/A
831082SN/Avoid
842680Sktlim@umich.eduInterruptStartEvent::process(ThreadContext *tc)
851082SN/A{
862680Sktlim@umich.edu    if (tc->getKernelStats())
872680Sktlim@umich.edu        tc->getKernelStats()->mode(Kernel::interrupt, tc);
881082SN/A}
891082SN/A
901082SN/Avoid
912680Sktlim@umich.eduInterruptEndEvent::process(ThreadContext *tc)
921082SN/A{
931082SN/A    // We go back to kernel, if we are user, inside the rti
941082SN/A    // pal code we will get switched to user because of the ICM write
952680Sktlim@umich.edu    if (tc->getKernelStats())
962680Sktlim@umich.edu        tc->getKernelStats()->mode(Kernel::kernel, tc);
971082SN/A}
98