scoreboard_check_stage.cc revision 11308:7d8836fd043d
12600SN/A/* 22600SN/A * Copyright (c) 2014-2015 Advanced Micro Devices, Inc. 32600SN/A * All rights reserved. 42600SN/A * 52600SN/A * For use for simulation and test purposes only 62600SN/A * 72600SN/A * Redistribution and use in source and binary forms, with or without 82600SN/A * modification, are permitted provided that the following conditions are met: 92600SN/A * 102600SN/A * 1. Redistributions of source code must retain the above copyright notice, 112600SN/A * this list of conditions and the following disclaimer. 122600SN/A * 132600SN/A * 2. Redistributions in binary form must reproduce the above copyright notice, 142600SN/A * this list of conditions and the following disclaimer in the documentation 152600SN/A * and/or other materials provided with the distribution. 162600SN/A * 172600SN/A * 3. Neither the name of the copyright holder nor the names of its contributors 182600SN/A * may be used to endorse or promote products derived from this software 192600SN/A * without specific prior written permission. 202600SN/A * 212600SN/A * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 222600SN/A * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 232600SN/A * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 242600SN/A * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE 252600SN/A * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 262600SN/A * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 272665Ssaidi@eecs.umich.edu * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 282665Ssaidi@eecs.umich.edu * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 292600SN/A * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 302600SN/A * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 312600SN/A * POSSIBILITY OF SUCH DAMAGE. 322600SN/A * 332600SN/A * Author: Sooraj Puthoor 342600SN/A */ 352600SN/A 362600SN/A#include "gpu-compute/scoreboard_check_stage.hh" 372600SN/A 382600SN/A#include "gpu-compute/compute_unit.hh" 392600SN/A#include "gpu-compute/gpu_static_inst.hh" 4011381Sbrandon.potter@amd.com#include "gpu-compute/shader.hh" 412600SN/A#include "gpu-compute/wavefront.hh" 425543Ssaidi@eecs.umich.edu#include "params/ComputeUnit.hh" 435543Ssaidi@eecs.umich.edu 445543Ssaidi@eecs.umich.eduScoreboardCheckStage::ScoreboardCheckStage(const ComputeUnitParams *p) 455543Ssaidi@eecs.umich.edu : numSIMDs(p->num_SIMDs), 465543Ssaidi@eecs.umich.edu numMemUnits(p->num_global_mem_pipes + p->num_shared_mem_pipes), 472600SN/A numGlbMemPipes(p->num_global_mem_pipes), 482600SN/A numShrMemPipes(p->num_shared_mem_pipes), 492600SN/A vectorAluInstAvail(nullptr), 502600SN/A lastGlbMemSimd(-1), 512600SN/A lastShrMemSimd(-1), glbMemInstAvail(nullptr), 522600SN/A shrMemInstAvail(nullptr) 535543Ssaidi@eecs.umich.edu{ 545543Ssaidi@eecs.umich.edu} 555543Ssaidi@eecs.umich.edu 565543Ssaidi@eecs.umich.eduScoreboardCheckStage::~ScoreboardCheckStage() 575543Ssaidi@eecs.umich.edu{ 582600SN/A readyList.clear(); 592600SN/A waveStatusList.clear(); 602600SN/A shrMemInstAvail = nullptr; 612600SN/A glbMemInstAvail = nullptr; 628600Ssteve.reinhardt@amd.com} 632600SN/A 642600SN/Avoid 652600SN/AScoreboardCheckStage::init(ComputeUnit *cu) 66{ 67 computeUnit = cu; 68 _name = computeUnit->name() + ".ScoreboardCheckStage"; 69 70 for (int unitId = 0; unitId < numSIMDs + numMemUnits; ++unitId) { 71 readyList.push_back(&computeUnit->readyList[unitId]); 72 } 73 74 for (int unitId = 0; unitId < numSIMDs; ++unitId) { 75 waveStatusList.push_back(&computeUnit->waveStatusList[unitId]); 76 } 77 78 vectorAluInstAvail = &computeUnit->vectorAluInstAvail; 79 glbMemInstAvail= &computeUnit->glbMemInstAvail; 80 shrMemInstAvail= &computeUnit->shrMemInstAvail; 81} 82 83void 84ScoreboardCheckStage::initStatistics() 85{ 86 lastGlbMemSimd = -1; 87 lastShrMemSimd = -1; 88 *glbMemInstAvail = 0; 89 *shrMemInstAvail = 0; 90 91 for (int unitId = 0; unitId < numSIMDs; ++unitId) 92 vectorAluInstAvail->at(unitId) = false; 93} 94 95void 96ScoreboardCheckStage::collectStatistics(Wavefront *curWave, int unitId) 97{ 98 if (curWave->instructionBuffer.empty()) 99 return; 100 101 // track which vector SIMD unit has at least one WV with a vector 102 // ALU as the oldest instruction in its Instruction buffer 103 vectorAluInstAvail->at(unitId) = vectorAluInstAvail->at(unitId) || 104 curWave->isOldestInstALU(); 105 106 // track how many vector SIMD units have at least one WV with a 107 // vector Global memory instruction as the oldest instruction 108 // in its Instruction buffer 109 if ((curWave->isOldestInstGMem() || curWave->isOldestInstPrivMem() || 110 curWave->isOldestInstFlatMem()) && lastGlbMemSimd != unitId && 111 *glbMemInstAvail <= 1) { 112 (*glbMemInstAvail)++; 113 lastGlbMemSimd = unitId; 114 } 115 116 // track how many vector SIMD units have at least one WV with a 117 // vector shared memory (LDS) instruction as the oldest instruction 118 // in its Instruction buffer 119 // TODO: parametrize the limit of the LDS units 120 if (curWave->isOldestInstLMem() && (*shrMemInstAvail <= numShrMemPipes) && 121 lastShrMemSimd != unitId) { 122 (*shrMemInstAvail)++; 123 lastShrMemSimd = unitId; 124 } 125} 126 127void 128ScoreboardCheckStage::exec() 129{ 130 initStatistics(); 131 132 // reset the ready list for all execution units; it will be 133 // constructed every cycle since resource availability may change 134 for (int unitId = 0; unitId < numSIMDs + numMemUnits; ++unitId) { 135 readyList[unitId]->clear(); 136 } 137 138 // iterate over the Wavefronts of all SIMD units 139 for (int unitId = 0; unitId < numSIMDs; ++unitId) { 140 for (int wvId = 0; wvId < computeUnit->shader->n_wf; ++wvId) { 141 // reset the ready status of each wavefront 142 waveStatusList[unitId]->at(wvId).second = BLOCKED; 143 Wavefront *curWave = waveStatusList[unitId]->at(wvId).first; 144 collectStatistics(curWave, unitId); 145 146 if (curWave->ready(Wavefront::I_ALU)) { 147 readyList[unitId]->push_back(curWave); 148 waveStatusList[unitId]->at(wvId).second = READY; 149 } else if (curWave->ready(Wavefront::I_GLOBAL)) { 150 if (computeUnit->cedeSIMD(unitId, wvId)) { 151 continue; 152 } 153 154 readyList[computeUnit->GlbMemUnitId()]->push_back(curWave); 155 waveStatusList[unitId]->at(wvId).second = READY; 156 } else if (curWave->ready(Wavefront::I_SHARED)) { 157 readyList[computeUnit->ShrMemUnitId()]->push_back(curWave); 158 waveStatusList[unitId]->at(wvId).second = READY; 159 } else if (curWave->ready(Wavefront::I_FLAT)) { 160 readyList[computeUnit->GlbMemUnitId()]->push_back(curWave); 161 waveStatusList[unitId]->at(wvId).second = READY; 162 } else if (curWave->ready(Wavefront::I_PRIVATE)) { 163 readyList[computeUnit->GlbMemUnitId()]->push_back(curWave); 164 waveStatusList[unitId]->at(wvId).second = READY; 165 } 166 } 167 } 168} 169 170void 171ScoreboardCheckStage::regStats() 172{ 173} 174