condition_register_state.cc revision 11699:c7453f485a5f 
1/*
2 * Copyright (c) 2015 Advanced Micro Devices, Inc.
3 * All rights reserved.
4 *
5 * For use for simulation and test purposes only
6 *
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions are met:
9 *
10 * 1. Redistributions of source code must retain the above copyright notice,
11 * this list of conditions and the following disclaimer.
12 *
13 * 2. Redistributions in binary form must reproduce the above copyright notice,
14 * this list of conditions and the following disclaimer in the documentation
15 * and/or other materials provided with the distribution.
16 *
17 * 3. Neither the name of the copyright holder nor the names of its contributors
18 * may be used to endorse or promote products derived from this software
19 * without specific prior written permission.
20 *
21 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
22 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
23 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
24 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
25 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
26 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
27 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
28 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
29 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
30 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
31 * POSSIBILITY OF SUCH DAMAGE.
32 *
33 * Author: John Kalamatianos
34 */
35
36#include "gpu-compute/condition_register_state.hh"
37
38#include "gpu-compute/compute_unit.hh"
39#include "gpu-compute/gpu_static_inst.hh"
40#include "gpu-compute/shader.hh"
41#include "gpu-compute/wavefront.hh"
42
43ConditionRegisterState::ConditionRegisterState()
44{
45    computeUnit = nullptr;
46    c_reg.clear();
47    busy.clear();
48}
49
50void
51ConditionRegisterState::setParent(ComputeUnit *_computeUnit)
52{
53    computeUnit = _computeUnit;
54    _name = computeUnit->name() + ".CondRegState";
55}
56
57void
58ConditionRegisterState::init(uint32_t _size)
59{
60    c_reg.resize(_size);
61    busy.resize(_size, 0);
62}
63
64void
65ConditionRegisterState::exec(GPUDynInstPtr ii, Wavefront *w)
66{
67    // iterate over all operands
68    for (auto i = 0; i < ii->getNumOperands(); ++i) {
69        // is this a condition register destination operand?
70        if (ii->isCondRegister(i) && ii->isDstOperand(i)) {
71            // mark the register as busy
72            markReg(ii->getRegisterIndex(i, ii), 1);
73            uint32_t pipeLen =  w->computeUnit->spBypassLength();
74
75            // schedule an event for marking the register as ready
76            w->computeUnit->
77                registerEvent(w->simdId, ii->getRegisterIndex(i, ii),
78                              ii->getOperandSize(i),
79                              w->computeUnit->shader->tick_cnt +
80                              w->computeUnit->shader->ticks(pipeLen), 0);
81        }
82    }
83}
84