i8259.hh revision 11175:2324ed5fa9f4 
1/*
2 * Copyright (c) 2004-2005 The Regents of The University of Michigan
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;
9 * redistributions in binary form must reproduce the above copyright
10 * notice, this list of conditions and the following disclaimer in the
11 * documentation and/or other materials provided with the distribution;
12 * neither the name of the copyright holders nor the names of its
13 * contributors may be used to endorse or promote products derived from
14 * this software without specific prior written permission.
15 *
16 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
17 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
18 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
19 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
20 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
21 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
22 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
26 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 *
28 * Authors: Gabe Black
29 */
30
31#ifndef __DEV_X86_I8259_HH__
32#define __DEV_X86_I8259_HH__
33
34#include "dev/x86/intdev.hh"
35#include "dev/io_device.hh"
36#include "enums/X86I8259CascadeMode.hh"
37#include "params/I8259.hh"
38
39namespace X86ISA
40{
41
42class I8259 : public BasicPioDevice, public IntDevice
43{
44  protected:
45    static const int NumLines = 8;
46    bool pinStates[NumLines];
47
48    Tick latency;
49    IntSourcePin *output;
50    Enums::X86I8259CascadeMode mode;
51    I8259 * slave;
52
53    // Interrupt Request Register
54    uint8_t IRR;
55    // In Service Register
56    uint8_t ISR;
57    // Interrupt Mask Register
58    uint8_t IMR;
59
60    // The higher order bits of the vector to return
61    uint8_t vectorOffset;
62
63    bool cascadeMode;
64    // A bit vector of lines with slaves attached, or the slave id, depending
65    // on if this is a master or slave PIC.
66    uint8_t cascadeBits;
67
68    bool edgeTriggered;
69    bool readIRR;
70
71    // State machine information for reading in initialization control words.
72    bool expectICW4;
73    int initControlWord;
74
75    // Whether or not the PIC is in auto EOI mode.
76    bool autoEOI;
77
78    void requestInterrupt(int line);
79    void handleEOI(int line);
80
81  public:
82    typedef I8259Params Params;
83
84    const Params *
85    params() const
86    {
87        return dynamic_cast<const Params *>(_params);
88    }
89
90    I8259(Params * p);
91
92    Tick read(PacketPtr pkt) override;
93    Tick write(PacketPtr pkt) override;
94
95    void
96    maskAll()
97    {
98        IMR = 0xFF;
99    }
100
101    void
102    unmaskAll()
103    {
104        IMR = 0x00;
105    }
106
107    void signalInterrupt(int line) override;
108    void raiseInterruptPin(int number) override;
109    void lowerInterruptPin(int number) override;
110    int getVector();
111
112    void serialize(CheckpointOut &cp) const override;
113    void unserialize(CheckpointIn &cp) override;
114};
115
116} // namespace X86ISA
117
118#endif //__DEV_X86_I8259_HH__
119