i8254.cc revision 11793 
1/*
2 * Copyright (c) 2008 The Regents of The University of Michigan
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;
9 * redistributions in binary form must reproduce the above copyright
10 * notice, this list of conditions and the following disclaimer in the
11 * documentation and/or other materials provided with the distribution;
12 * neither the name of the copyright holders nor the names of its
13 * contributors may be used to endorse or promote products derived from
14 * this software without specific prior written permission.
15 *
16 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
17 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
18 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
19 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
20 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
21 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
22 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
26 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 *
28 * Authors: Gabe Black
29 */
30
31#include "dev/x86/i8254.hh"
32
33#include "debug/I8254.hh"
34#include "dev/x86/intdev.hh"
35#include "mem/packet.hh"
36#include "mem/packet_access.hh"
37
38void
39X86ISA::I8254::counterInterrupt(unsigned int num)
40{
41    DPRINTF(I8254, "Interrupt from counter %d.\n", num);
42    if (num == 0) {
43        intPin->raise();
44        //XXX This is a hack.
45        intPin->lower();
46    }
47}
48
49Tick
50X86ISA::I8254::read(PacketPtr pkt)
51{
52    assert(pkt->getSize() == 1);
53    Addr offset = pkt->getAddr() - pioAddr;
54    if (offset < 3) {
55        pkt->set(pit.readCounter(offset));
56    } else if (offset == 3) {
57        pkt->set(uint8_t(-1));
58    } else {
59        panic("Read from undefined i8254 register.\n");
60    }
61    pkt->makeAtomicResponse();
62    return latency;
63}
64
65Tick
66X86ISA::I8254::write(PacketPtr pkt)
67{
68    assert(pkt->getSize() == 1);
69    Addr offset = pkt->getAddr() - pioAddr;
70    if (offset < 3) {
71        pit.writeCounter(offset, pkt->get<uint8_t>());
72    } else if (offset == 3) {
73        pit.writeControl(pkt->get<uint8_t>());
74    } else {
75        panic("Write to undefined i8254 register.\n");
76    }
77    pkt->makeAtomicResponse();
78    return latency;
79}
80
81void
82X86ISA::I8254::serialize(CheckpointOut &cp) const
83{
84    pit.serialize("pit", cp);
85}
86
87void
88X86ISA::I8254::unserialize(CheckpointIn &cp)
89{
90    pit.unserialize("pit", cp);
91}
92
93void
94X86ISA::I8254::startup()
95{
96    pit.startup();
97}
98
99X86ISA::I8254 *
100I8254Params::create()
101{
102    return new X86ISA::I8254(this);
103}
104