i82094aa.hh revision 5651 
1/*
2 * Copyright (c) 2008 The Regents of The University of Michigan
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;
9 * redistributions in binary form must reproduce the above copyright
10 * notice, this list of conditions and the following disclaimer in the
11 * documentation and/or other materials provided with the distribution;
12 * neither the name of the copyright holders nor the names of its
13 * contributors may be used to endorse or promote products derived from
14 * this software without specific prior written permission.
15 *
16 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
17 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
18 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
19 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
20 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
21 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
22 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
26 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 *
28 * Authors: Gabe Black
29 */
30
31#ifndef __DEV_X86_I82094AA_HH__
32#define __DEV_X86_I82094AA_HH__
33
34#include "base/bitunion.hh"
35#include "base/range_map.hh"
36#include "dev/io_device.hh"
37#include "dev/x86/intdev.hh"
38#include "params/I82094AA.hh"
39
40namespace X86ISA
41{
42
43class I82094AA : public PioDevice, public IntDev
44{
45  public:
46    BitUnion64(RedirTableEntry)
47        Bitfield<63, 32> topDW;
48        Bitfield<55, 32> topReserved;
49        Bitfield<31, 0> bottomDW;
50        Bitfield<31, 17> bottomReserved;
51        Bitfield<63, 56> dest;
52        Bitfield<16> mask;
53        Bitfield<15> trigger;
54        Bitfield<14> remoteIRR;
55        Bitfield<13> polarity;
56        Bitfield<12> deliveryStatus;
57        Bitfield<11> destMode;
58        Bitfield<10, 8> deliveryMode;
59        Bitfield<7, 0> vector;
60    EndBitUnion(RedirTableEntry)
61
62  protected:
63    System * system;
64    Tick latency;
65    Addr pioAddr;
66
67    uint8_t regSel;
68    uint8_t id;
69    uint8_t arbId;
70
71    static const uint8_t TableSize = 24;
72    // This implementation is based on version 0x11, but 0x14 avoids having
73    // to deal with the arbitration and APIC bus guck.
74    static const uint8_t APICVersion = 0x14;
75
76    RedirTableEntry redirTable[TableSize];
77
78  public:
79    typedef I82094AAParams Params;
80
81    const Params *
82    params() const
83    {
84        return dynamic_cast<const Params *>(_params);
85    }
86
87    I82094AA(Params *p);
88
89    Tick read(PacketPtr pkt);
90    Tick write(PacketPtr pkt);
91
92    void addressRanges(AddrRangeList &range_list)
93    {
94        range_list.clear();
95        range_list.push_back(RangeEx(pioAddr, pioAddr + 4));
96        range_list.push_back(RangeEx(pioAddr + 16, pioAddr + 20));
97    }
98
99    void getIntAddrRange(AddrRangeList &range_list)
100    {
101        range_list.clear();
102        range_list.push_back(RangeEx(x86InterruptAddress(1, 0),
103                    x86InterruptAddress(1, 0) + PhysAddrAPICRangeSize));
104    }
105
106    void writeReg(uint8_t offset, uint32_t value);
107    uint32_t readReg(uint8_t offset);
108
109    Port *getPort(const std::string &if_name, int idx = -1)
110    {
111        if (if_name == "int_port")
112            return intPort;
113        return PioDevice::getPort(if_name, idx);
114    }
115
116    void signalInterrupt(int line);
117};
118
119}; // namespace X86ISA
120
121#endif //__DEV_X86_SOUTH_BRIDGE_I8254_HH__
122