etherdevice.hh revision 11263
14981SN/A/*
24981SN/A * Copyright (c) 2007 The Regents of The University of Michigan
34981SN/A * All rights reserved.
44981SN/A *
54981SN/A * Redistribution and use in source and binary forms, with or without
64981SN/A * modification, are permitted provided that the following conditions are
74981SN/A * met: redistributions of source code must retain the above copyright
84981SN/A * notice, this list of conditions and the following disclaimer;
94981SN/A * redistributions in binary form must reproduce the above copyright
104981SN/A * notice, this list of conditions and the following disclaimer in the
114981SN/A * documentation and/or other materials provided with the distribution;
124981SN/A * neither the name of the copyright holders nor the names of its
134981SN/A * contributors may be used to endorse or promote products derived from
144981SN/A * this software without specific prior written permission.
154981SN/A *
164981SN/A * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
174981SN/A * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
184981SN/A * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
194981SN/A * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
204981SN/A * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
214981SN/A * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
224981SN/A * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
234981SN/A * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
244981SN/A * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
254981SN/A * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
264981SN/A * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
274981SN/A *
284981SN/A * Authors: Ali Saidi
294981SN/A */
304981SN/A
314981SN/A/**
324981SN/A * @file
334981SN/A * Base Ethernet Device declaration.
344981SN/A */
354981SN/A
3611263Sandreas.sandberg@arm.com#ifndef __DEV_NET_ETHERDEVICE_HH__
3711263Sandreas.sandberg@arm.com#define __DEV_NET_ETHERDEVICE_HH__
384981SN/A
395485SN/A#include "base/statistics.hh"
4011260SN/A#include "dev/pci/device.hh"
4111263Sandreas.sandberg@arm.com#include "params/EtherDevBase.hh"
424981SN/A#include "params/EtherDevice.hh"
434981SN/A#include "sim/sim_object.hh"
444981SN/A
454981SN/Aclass EtherInt;
464981SN/A
474981SN/A/**
484981SN/A * The base EtherObject class, allows for an accesor function to a
494981SN/A * simobj that returns the Port.
504981SN/A */
519807SN/Aclass EtherDevice : public PciDevice
524981SN/A{
534981SN/A  public:
544981SN/A    typedef EtherDeviceParams Params;
554981SN/A    EtherDevice(const Params *params)
569807SN/A        : PciDevice(params)
574981SN/A    {}
584981SN/A
594981SN/A    const Params *
604981SN/A    params() const
614981SN/A    {
624981SN/A        return dynamic_cast<const Params *>(_params);
634981SN/A    }
644981SN/A
654981SN/A  public:
664981SN/A    /** Additional function to return the Port of a memory object. */
674981SN/A    virtual EtherInt *getEthPort(const std::string &if_name, int idx = -1) = 0;
684981SN/A
695485SN/A  public:
705485SN/A    void regStats();
715485SN/A
725485SN/A  protected:
735999SN/A    Stats::Scalar txBytes;
745999SN/A    Stats::Scalar rxBytes;
755999SN/A    Stats::Scalar txPackets;
765999SN/A    Stats::Scalar rxPackets;
775999SN/A    Stats::Scalar txIpChecksums;
785999SN/A    Stats::Scalar rxIpChecksums;
795999SN/A    Stats::Scalar txTcpChecksums;
805999SN/A    Stats::Scalar rxTcpChecksums;
815999SN/A    Stats::Scalar txUdpChecksums;
825999SN/A    Stats::Scalar rxUdpChecksums;
835999SN/A    Stats::Scalar descDmaReads;
845999SN/A    Stats::Scalar descDmaWrites;
855999SN/A    Stats::Scalar descDmaRdBytes;
865999SN/A    Stats::Scalar descDmaWrBytes;
875485SN/A    Stats::Formula totBandwidth;
885485SN/A    Stats::Formula totPackets;
895485SN/A    Stats::Formula totBytes;
905485SN/A    Stats::Formula totPacketRate;
915485SN/A    Stats::Formula txBandwidth;
925485SN/A    Stats::Formula rxBandwidth;
935485SN/A    Stats::Formula txPacketRate;
945485SN/A    Stats::Formula rxPacketRate;
955999SN/A    Stats::Scalar postedSwi;
965485SN/A    Stats::Formula coalescedSwi;
975999SN/A    Stats::Scalar totalSwi;
985999SN/A    Stats::Scalar postedRxIdle;
995485SN/A    Stats::Formula coalescedRxIdle;
1005999SN/A    Stats::Scalar totalRxIdle;
1015999SN/A    Stats::Scalar postedRxOk;
1025485SN/A    Stats::Formula coalescedRxOk;
1035999SN/A    Stats::Scalar totalRxOk;
1045999SN/A    Stats::Scalar postedRxDesc;
1055485SN/A    Stats::Formula coalescedRxDesc;
1065999SN/A    Stats::Scalar totalRxDesc;
1075999SN/A    Stats::Scalar postedTxOk;
1085485SN/A    Stats::Formula coalescedTxOk;
1095999SN/A    Stats::Scalar totalTxOk;
1105999SN/A    Stats::Scalar postedTxIdle;
1115485SN/A    Stats::Formula coalescedTxIdle;
1125999SN/A    Stats::Scalar totalTxIdle;
1135999SN/A    Stats::Scalar postedTxDesc;
1145485SN/A    Stats::Formula coalescedTxDesc;
1155999SN/A    Stats::Scalar totalTxDesc;
1165999SN/A    Stats::Scalar postedRxOrn;
1175485SN/A    Stats::Formula coalescedRxOrn;
1185999SN/A    Stats::Scalar totalRxOrn;
1195485SN/A    Stats::Formula coalescedTotal;
1205999SN/A    Stats::Scalar postedInterrupts;
1215999SN/A    Stats::Scalar droppedPackets;
1224981SN/A};
1234981SN/A
1249339SN/A/**
1259339SN/A * Dummy class to keep the Python class hierarchy in sync with the C++
1269339SN/A * object hierarchy.
1279339SN/A *
1289339SN/A * The Python object hierarchy includes the EtherDevBase class which
1299339SN/A * is used by some ethernet devices as a way to share common
1309339SN/A * configuration information in the generated param structs. Since the
1319339SN/A * Python hierarchy is used to generate a SWIG interface for all C++
1329339SN/A * SimObjects, we need to reflect this in the C++ object hierarchy. If
1339339SN/A * we don't, SWIG might end up doing 'bad things' when it down casts
1349339SN/A * ethernet objects to their base class(es).
1359339SN/A */
1369339SN/Aclass EtherDevBase : public EtherDevice
1379339SN/A{
1389339SN/A  public:
1399339SN/A    EtherDevBase(const EtherDevBaseParams *params)
1409339SN/A        : EtherDevice(params)
1419339SN/A    {}
1429339SN/A
1439339SN/A    const EtherDevBaseParams *
1449339SN/A    params() const
1459339SN/A    {
1469339SN/A        return dynamic_cast<const EtherDevBaseParams *>(_params);
1479339SN/A    }
1489339SN/A
1499339SN/A};
1509339SN/A
15111263Sandreas.sandberg@arm.com#endif // __DEV_NET_ETHERDEVICE_HH__
15211263Sandreas.sandberg@arm.com
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