14981SN/A/*
24981SN/A * Copyright (c) 2007 The Regents of The University of Michigan
34981SN/A * All rights reserved.
44981SN/A *
54981SN/A * Redistribution and use in source and binary forms, with or without
64981SN/A * modification, are permitted provided that the following conditions are
74981SN/A * met: redistributions of source code must retain the above copyright
84981SN/A * notice, this list of conditions and the following disclaimer;
94981SN/A * redistributions in binary form must reproduce the above copyright
104981SN/A * notice, this list of conditions and the following disclaimer in the
114981SN/A * documentation and/or other materials provided with the distribution;
124981SN/A * neither the name of the copyright holders nor the names of its
134981SN/A * contributors may be used to endorse or promote products derived from
144981SN/A * this software without specific prior written permission.
154981SN/A *
164981SN/A * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
174981SN/A * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
184981SN/A * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
194981SN/A * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
204981SN/A * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
214981SN/A * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
224981SN/A * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
234981SN/A * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
244981SN/A * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
254981SN/A * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
264981SN/A * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
274981SN/A *
284981SN/A * Authors: Ali Saidi
294981SN/A */
304981SN/A
314981SN/A/**
324981SN/A * @file
334981SN/A * Base Ethernet Device declaration.
344981SN/A */
354981SN/A
3611263Sandreas.sandberg@arm.com#ifndef __DEV_NET_ETHERDEVICE_HH__
3711263Sandreas.sandberg@arm.com#define __DEV_NET_ETHERDEVICE_HH__
384981SN/A
395485SN/A#include "base/statistics.hh"
4011260SN/A#include "dev/pci/device.hh"
4111263Sandreas.sandberg@arm.com#include "params/EtherDevBase.hh"
424981SN/A#include "params/EtherDevice.hh"
434981SN/A#include "sim/sim_object.hh"
444981SN/A
454981SN/Aclass EtherInt;
464981SN/A
4713784Sgabeblack@google.comclass EtherDevice : public PciDevice
484981SN/A{
494981SN/A  public:
504981SN/A    typedef EtherDeviceParams Params;
514981SN/A    EtherDevice(const Params *params)
529807SN/A        : PciDevice(params)
534981SN/A    {}
544981SN/A
554981SN/A    const Params *
564981SN/A    params() const
574981SN/A    {
584981SN/A        return dynamic_cast<const Params *>(_params);
594981SN/A    }
604981SN/A
614981SN/A  public:
625485SN/A    void regStats();
635485SN/A
645485SN/A  protected:
655999SN/A    Stats::Scalar txBytes;
665999SN/A    Stats::Scalar rxBytes;
675999SN/A    Stats::Scalar txPackets;
685999SN/A    Stats::Scalar rxPackets;
695999SN/A    Stats::Scalar txIpChecksums;
705999SN/A    Stats::Scalar rxIpChecksums;
715999SN/A    Stats::Scalar txTcpChecksums;
725999SN/A    Stats::Scalar rxTcpChecksums;
735999SN/A    Stats::Scalar txUdpChecksums;
745999SN/A    Stats::Scalar rxUdpChecksums;
755999SN/A    Stats::Scalar descDmaReads;
765999SN/A    Stats::Scalar descDmaWrites;
775999SN/A    Stats::Scalar descDmaRdBytes;
785999SN/A    Stats::Scalar descDmaWrBytes;
795485SN/A    Stats::Formula totBandwidth;
805485SN/A    Stats::Formula totPackets;
815485SN/A    Stats::Formula totBytes;
825485SN/A    Stats::Formula totPacketRate;
835485SN/A    Stats::Formula txBandwidth;
845485SN/A    Stats::Formula rxBandwidth;
855485SN/A    Stats::Formula txPacketRate;
865485SN/A    Stats::Formula rxPacketRate;
875999SN/A    Stats::Scalar postedSwi;
885485SN/A    Stats::Formula coalescedSwi;
895999SN/A    Stats::Scalar totalSwi;
905999SN/A    Stats::Scalar postedRxIdle;
915485SN/A    Stats::Formula coalescedRxIdle;
925999SN/A    Stats::Scalar totalRxIdle;
935999SN/A    Stats::Scalar postedRxOk;
945485SN/A    Stats::Formula coalescedRxOk;
955999SN/A    Stats::Scalar totalRxOk;
965999SN/A    Stats::Scalar postedRxDesc;
975485SN/A    Stats::Formula coalescedRxDesc;
985999SN/A    Stats::Scalar totalRxDesc;
995999SN/A    Stats::Scalar postedTxOk;
1005485SN/A    Stats::Formula coalescedTxOk;
1015999SN/A    Stats::Scalar totalTxOk;
1025999SN/A    Stats::Scalar postedTxIdle;
1035485SN/A    Stats::Formula coalescedTxIdle;
1045999SN/A    Stats::Scalar totalTxIdle;
1055999SN/A    Stats::Scalar postedTxDesc;
1065485SN/A    Stats::Formula coalescedTxDesc;
1075999SN/A    Stats::Scalar totalTxDesc;
1085999SN/A    Stats::Scalar postedRxOrn;
1095485SN/A    Stats::Formula coalescedRxOrn;
1105999SN/A    Stats::Scalar totalRxOrn;
1115485SN/A    Stats::Formula coalescedTotal;
1125999SN/A    Stats::Scalar postedInterrupts;
1135999SN/A    Stats::Scalar droppedPackets;
1144981SN/A};
1154981SN/A
1169339SN/A/**
1179339SN/A * Dummy class to keep the Python class hierarchy in sync with the C++
1189339SN/A * object hierarchy.
1199339SN/A *
1209339SN/A * The Python object hierarchy includes the EtherDevBase class which
1219339SN/A * is used by some ethernet devices as a way to share common
1229339SN/A * configuration information in the generated param structs. Since the
12311990Sandreas.sandberg@arm.com * Python hierarchy is used to generate a Python interfaces for all C++
12411990Sandreas.sandberg@arm.com * SimObjects, we need to reflect this in the C++ object hierarchy.
1259339SN/A */
1269339SN/Aclass EtherDevBase : public EtherDevice
1279339SN/A{
1289339SN/A  public:
1299339SN/A    EtherDevBase(const EtherDevBaseParams *params)
1309339SN/A        : EtherDevice(params)
1319339SN/A    {}
1329339SN/A
1339339SN/A    const EtherDevBaseParams *
1349339SN/A    params() const
1359339SN/A    {
1369339SN/A        return dynamic_cast<const EtherDevBaseParams *>(_params);
1379339SN/A    }
1389339SN/A
1399339SN/A};
1409339SN/A
14111263Sandreas.sandberg@arm.com#endif // __DEV_NET_ETHERDEVICE_HH__
14211263Sandreas.sandberg@arm.com
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