Ethernet.py revision 4982 
1# Copyright (c) 2005-2007 The Regents of The University of Michigan
2# All rights reserved.
3#
4# Redistribution and use in source and binary forms, with or without
5# modification, are permitted provided that the following conditions are
6# met: redistributions of source code must retain the above copyright
7# notice, this list of conditions and the following disclaimer;
8# redistributions in binary form must reproduce the above copyright
9# notice, this list of conditions and the following disclaimer in the
10# documentation and/or other materials provided with the distribution;
11# neither the name of the copyright holders nor the names of its
12# contributors may be used to endorse or promote products derived from
13# this software without specific prior written permission.
14#
15# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
16# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
17# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
18# A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
19# OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
20# SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
21# LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
22# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
23# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
24# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
25# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
26#
27# Authors: Nathan Binkert
28
29from m5.SimObject import SimObject
30from m5.params import *
31from m5.proxy import *
32from Pci import PciDevice
33
34class EtherObject(SimObject):
35    type = 'EtherObject'
36    abstract = True
37
38class EtherLink(EtherObject):
39    type = 'EtherLink'
40    int0 = Port("interface 0")
41    int1 = Port("interface 1")
42    delay = Param.Latency('0us', "packet transmit delay")
43    delay_var = Param.Latency('0ns', "packet transmit delay variability")
44    speed = Param.NetworkBandwidth('1Gbps', "link speed")
45    dump = Param.EtherDump(NULL, "dump object")
46
47class EtherBus(EtherObject):
48    type = 'EtherBus'
49    loopback = Param.Bool(True, "send packet back to the sending interface")
50    dump = Param.EtherDump(NULL, "dump object")
51    speed = Param.NetworkBandwidth('100Mbps', "bus speed in bits per second")
52
53class EtherTap(EtherObject):
54    type = 'EtherTap'
55    bufsz = Param.Int(10000, "tap buffer size")
56    dump = Param.EtherDump(NULL, "dump object")
57    port = Param.UInt16(3500, "tap port")
58
59class EtherDump(SimObject):
60    type = 'EtherDump'
61    file = Param.String("dump file")
62    maxlen = Param.Int(96, "max portion of packet data to dump")
63
64class EtherDevice(PciDevice):
65    type = 'EtherDevice'
66    abstract = True
67    interface = Port("Ethernet Interrface")
68
69class IGbE(EtherDevice):
70    type = 'IGbE'
71    hardware_address = Param.EthernetAddr(NextEthernetAddr,
72        "Ethernet Hardware Address")
73    use_flow_control = Param.Bool(False,
74        "Should we use xon/xoff flow contorl (UNIMPLEMENTD)")
75    rx_fifo_size = Param.MemorySize('384kB', "Size of the rx FIFO")
76    tx_fifo_size = Param.MemorySize('384kB', "Size of the tx FIFO")
77    rx_desc_cache_size = Param.Int(64,
78        "Number of enteries in the rx descriptor cache")
79    tx_desc_cache_size = Param.Int(64,
80        "Number of enteries in the rx descriptor cache")
81    clock = Param.Clock('500MHz', "Clock speed of the device")
82    VendorID = 0x8086
83    DeviceID = 0x1075
84    SubsystemID = 0x1008
85    SubsystemVendorID = 0x8086
86    Status = 0x0000
87    SubClassCode = 0x00
88    ClassCode = 0x02
89    ProgIF = 0x00
90    BAR0 = 0x00000000
91    BAR1 = 0x00000000
92    BAR2 = 0x00000000
93    BAR3 = 0x00000000
94    BAR4 = 0x00000000
95    BAR5 = 0x00000000
96    MaximumLatency = 0x00
97    MinimumGrant = 0xff
98    InterruptLine = 0x1e
99    InterruptPin = 0x01
100    BAR0Size = '128kB'
101
102class EtherDevBase(EtherDevice):
103    type = 'EtherDevBase'
104    abstract = True
105    hardware_address = Param.EthernetAddr(NextEthernetAddr,
106        "Ethernet Hardware Address")
107
108    clock = Param.Clock('0ns', "State machine processor frequency")
109
110    dma_read_delay = Param.Latency('0us', "fixed delay for dma reads")
111    dma_read_factor = Param.Latency('0us', "multiplier for dma reads")
112    dma_write_delay = Param.Latency('0us', "fixed delay for dma writes")
113    dma_write_factor = Param.Latency('0us', "multiplier for dma writes")
114
115    rx_delay = Param.Latency('1us', "Receive Delay")
116    tx_delay = Param.Latency('1us', "Transmit Delay")
117    rx_fifo_size = Param.MemorySize('512kB', "max size of rx fifo")
118    tx_fifo_size = Param.MemorySize('512kB', "max size of tx fifo")
119
120    rx_filter = Param.Bool(True, "Enable Receive Filter")
121    intr_delay = Param.Latency('10us', "Interrupt propagation delay")
122    rx_thread = Param.Bool(False, "dedicated kernel thread for transmit")
123    tx_thread = Param.Bool(False, "dedicated kernel threads for receive")
124    rss = Param.Bool(False, "Receive Side Scaling")
125
126class NSGigE(EtherDevBase):
127    type = 'NSGigE'
128
129    dma_data_free = Param.Bool(False, "DMA of Data is free")
130    dma_desc_free = Param.Bool(False, "DMA of Descriptors is free")
131    dma_no_allocate = Param.Bool(True, "Should we allocate cache on read")
132
133    VendorID = 0x100B
134    DeviceID = 0x0022
135    Status = 0x0290
136    SubClassCode = 0x00
137    ClassCode = 0x02
138    ProgIF = 0x00
139    BAR0 = 0x00000001
140    BAR1 = 0x00000000
141    BAR2 = 0x00000000
142    BAR3 = 0x00000000
143    BAR4 = 0x00000000
144    BAR5 = 0x00000000
145    MaximumLatency = 0x34
146    MinimumGrant = 0xb0
147    InterruptLine = 0x1e
148    InterruptPin = 0x01
149    BAR0Size = '256B'
150    BAR1Size = '4kB'
151
152
153
154class Sinic(EtherDevBase):
155    type = 'Sinic'
156    cxx_namespace = 'Sinic'
157    cxx_class = 'Device'
158
159    rx_max_copy = Param.MemorySize('1514B', "rx max copy")
160    tx_max_copy = Param.MemorySize('16kB', "tx max copy")
161    rx_max_intr = Param.UInt32(10, "max rx packets per interrupt")
162    rx_fifo_threshold = Param.MemorySize('384kB', "rx fifo high threshold")
163    rx_fifo_low_mark = Param.MemorySize('128kB', "rx fifo low threshold")
164    tx_fifo_high_mark = Param.MemorySize('384kB', "tx fifo high threshold")
165    tx_fifo_threshold = Param.MemorySize('128kB', "tx fifo low threshold")
166    virtual_count = Param.UInt32(1, "Virtualized SINIC")
167    zero_copy = Param.Bool(False, "Zero copy receive")
168    delay_copy = Param.Bool(False, "Delayed copy transmit")
169    virtual_addr = Param.Bool(False, "Virtual addressing")
170
171    VendorID = 0x1291
172    DeviceID = 0x1293
173    Status = 0x0290
174    SubClassCode = 0x00
175    ClassCode = 0x02
176    ProgIF = 0x00
177    BAR0 = 0x00000000
178    BAR1 = 0x00000000
179    BAR2 = 0x00000000
180    BAR3 = 0x00000000
181    BAR4 = 0x00000000
182    BAR5 = 0x00000000
183    MaximumLatency = 0x34
184    MinimumGrant = 0xb0
185    InterruptLine = 0x1e
186    InterruptPin = 0x01
187    BAR0Size = '64kB'
188
189
190