Ethernet.py revision 2916
1from m5 import build_env
2from m5.config import *
3from Device import DmaDevice
4from Pci import PciDevice, PciConfigData
5
6class EtherInt(SimObject):
7    type = 'EtherInt'
8    abstract = True
9    peer = Param.EtherInt(NULL, "peer interface")
10
11class EtherLink(SimObject):
12    type = 'EtherLink'
13    int1 = Param.EtherInt("interface 1")
14    int2 = Param.EtherInt("interface 2")
15    delay = Param.Latency('0us', "packet transmit delay")
16    delay_var = Param.Latency('0ns', "packet transmit delay variability")
17    speed = Param.NetworkBandwidth('1Gbps', "link speed")
18    dump = Param.EtherDump(NULL, "dump object")
19
20class EtherBus(SimObject):
21    type = 'EtherBus'
22    loopback = Param.Bool(True, "send packet back to the sending interface")
23    dump = Param.EtherDump(NULL, "dump object")
24    speed = Param.NetworkBandwidth('100Mbps', "bus speed in bits per second")
25
26class EtherTap(EtherInt):
27    type = 'EtherTap'
28    bufsz = Param.Int(10000, "tap buffer size")
29    dump = Param.EtherDump(NULL, "dump object")
30    port = Param.UInt16(3500, "tap port")
31
32class EtherDump(SimObject):
33    type = 'EtherDump'
34    file = Param.String("dump file")
35    maxlen = Param.Int(96, "max portion of packet data to dump")
36
37if build_env['ALPHA_TLASER']:
38
39    class EtherDev(DmaDevice):
40        type = 'EtherDev'
41        hardware_address = Param.EthernetAddr(NextEthernetAddr,
42            "Ethernet Hardware Address")
43
44        dma_data_free = Param.Bool(False, "DMA of Data is free")
45        dma_desc_free = Param.Bool(False, "DMA of Descriptors is free")
46        dma_read_delay = Param.Latency('0us', "fixed delay for dma reads")
47        dma_read_factor = Param.Latency('0us', "multiplier for dma reads")
48        dma_write_delay = Param.Latency('0us', "fixed delay for dma writes")
49        dma_write_factor = Param.Latency('0us', "multiplier for dma writes")
50        dma_no_allocate = Param.Bool(True, "Should we allocate cache on read")
51
52        rx_filter = Param.Bool(True, "Enable Receive Filter")
53        rx_delay = Param.Latency('1us', "Receive Delay")
54        tx_delay = Param.Latency('1us', "Transmit Delay")
55
56        intr_delay = Param.Latency('0us', "Interrupt Delay")
57        payload_bus = Param.Bus(NULL, "The IO Bus to attach to for payload")
58        physmem = Param.PhysicalMemory(Parent.any, "Physical Memory")
59        tlaser = Param.Turbolaser(Parent.any, "Turbolaser")
60
61    class EtherDevInt(EtherInt):
62        type = 'EtherDevInt'
63        device = Param.EtherDev("Ethernet device of this interface")
64
65class EtherDevBase(PciDevice):
66    hardware_address = Param.EthernetAddr(NextEthernetAddr,
67        "Ethernet Hardware Address")
68
69    clock = Param.Clock('0ns', "State machine processor frequency")
70
71    dma_read_delay = Param.Latency('0us', "fixed delay for dma reads")
72    dma_read_factor = Param.Latency('0us', "multiplier for dma reads")
73    dma_write_delay = Param.Latency('0us', "fixed delay for dma writes")
74    dma_write_factor = Param.Latency('0us', "multiplier for dma writes")
75
76    rx_delay = Param.Latency('1us', "Receive Delay")
77    tx_delay = Param.Latency('1us', "Transmit Delay")
78    rx_fifo_size = Param.MemorySize('512kB', "max size of rx fifo")
79    tx_fifo_size = Param.MemorySize('512kB', "max size of tx fifo")
80
81    rx_filter = Param.Bool(True, "Enable Receive Filter")
82    intr_delay = Param.Latency('10us', "Interrupt propagation delay")
83    rx_thread = Param.Bool(False, "dedicated kernel thread for transmit")
84    tx_thread = Param.Bool(False, "dedicated kernel threads for receive")
85    rss = Param.Bool(False, "Receive Side Scaling")
86
87class NSGigEPciData(PciConfigData):
88    VendorID = 0x100B
89    DeviceID = 0x0022
90    Status = 0x0290
91    SubClassCode = 0x00
92    ClassCode = 0x02
93    ProgIF = 0x00
94    BAR0 = 0x00000001
95    BAR1 = 0x00000000
96    BAR2 = 0x00000000
97    BAR3 = 0x00000000
98    BAR4 = 0x00000000
99    BAR5 = 0x00000000
100    MaximumLatency = 0x34
101    MinimumGrant = 0xb0
102    InterruptLine = 0x1e
103    InterruptPin = 0x01
104    BAR0Size = '256B'
105    BAR1Size = '4kB'
106
107class NSGigE(EtherDevBase):
108    type = 'NSGigE'
109
110    dma_data_free = Param.Bool(False, "DMA of Data is free")
111    dma_desc_free = Param.Bool(False, "DMA of Descriptors is free")
112    dma_no_allocate = Param.Bool(True, "Should we allocate cache on read")
113
114    configdata = NSGigEPciData()
115
116
117class NSGigEInt(EtherInt):
118    type = 'NSGigEInt'
119    device = Param.NSGigE("Ethernet device of this interface")
120
121class SinicPciData(PciConfigData):
122    VendorID = 0x1291
123    DeviceID = 0x1293
124    Status = 0x0290
125    SubClassCode = 0x00
126    ClassCode = 0x02
127    ProgIF = 0x00
128    BAR0 = 0x00000000
129    BAR1 = 0x00000000
130    BAR2 = 0x00000000
131    BAR3 = 0x00000000
132    BAR4 = 0x00000000
133    BAR5 = 0x00000000
134    MaximumLatency = 0x34
135    MinimumGrant = 0xb0
136    InterruptLine = 0x1e
137    InterruptPin = 0x01
138    BAR0Size = '64kB'
139
140class Sinic(EtherDevBase):
141    type = 'Sinic'
142
143    rx_max_copy = Param.MemorySize('1514B', "rx max copy")
144    tx_max_copy = Param.MemorySize('16kB', "tx max copy")
145    rx_max_intr = Param.UInt32(10, "max rx packets per interrupt")
146    rx_fifo_threshold = Param.MemorySize('384kB', "rx fifo high threshold")
147    rx_fifo_low_mark = Param.MemorySize('128kB', "rx fifo low threshold")
148    tx_fifo_high_mark = Param.MemorySize('384kB', "tx fifo high threshold")
149    tx_fifo_threshold = Param.MemorySize('128kB', "tx fifo low threshold")
150    virtual_count = Param.UInt32(1, "Virtualized SINIC")
151    zero_copy = Param.Bool(False, "Zero copy receive")
152    delay_copy = Param.Bool(False, "Delayed copy transmit")
153    virtual_addr = Param.Bool(False, "Virtual addressing")
154
155    configdata = SinicPciData()
156
157class SinicInt(EtherInt):
158    type = 'SinicInt'
159    device = Param.Sinic("Ethernet device of this interface")
160