malta_io.hh revision 5222:bb733a878f85 
1/*
2 * Copyright (c) 2004-2005 The Regents of The University of Michigan
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;
9 * redistributions in binary form must reproduce the above copyright
10 * notice, this list of conditions and the following disclaimer in the
11 * documentation and/or other materials provided with the distribution;
12 * neither the name of the copyright holders nor the names of its
13 * contributors may be used to endorse or promote products derived from
14 * this software without specific prior written permission.
15 *
16 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
17 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
18 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
19 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
20 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
21 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
22 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
26 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 *
28 * Authors: Ali Saidi
29 *          Andrew Schultz
30 *          Miguel Serrano
31 */
32
33/** @file
34 * Malta I/O Space mapping including RTC/timer interrupts
35 */
36
37#ifndef __DEV_MALTA_IO_HH__
38#define __DEV_MALTA_IO_HH__
39
40#include "dev/io_device.hh"
41#include "base/range.hh"
42#include "dev/mips/malta.hh"
43#include "sim/eventq.hh"
44#include "params/MaltaIO.hh"
45
46/**
47 * Malta I/O device is a catch all for all the south bridge stuff we care
48 * to implement.
49 */
50class MaltaIO : public BasicPioDevice
51{
52  private:
53    struct tm tm;
54  public:
55        /** Post an Interrupt to the CPU */
56    void postIntr(uint8_t interrupt);
57
58    /** Clear an Interrupt to the CPU */
59    void clearIntr(uint8_t interrupt);
60
61  protected:
62    /** Real-Time Clock (MC146818) */
63    class RTC
64    {
65      private:
66        /** Event for RTC periodic interrupt */
67        struct RTCEvent : public Event
68        {
69            /** A pointer back to malta to create interrupt the processor. */
70            Malta* malta;
71            Tick interval;
72
73            RTCEvent(Malta* t, Tick i);
74
75            /** Schedule the RTC periodic interrupt */
76            void scheduleIntr();
77
78            /** Event process to occur at interrupt*/
79            virtual void process();
80
81            /** Event description */
82            virtual const char *description();
83        };
84
85      private:
86        std::string _name;
87        const std::string &name() const { return _name; }
88
89        /** RTC periodic interrupt event */
90        RTCEvent event;
91
92        /** Current RTC register address/index */
93        int addr;
94
95        /** Data for real-time clock function */
96        union {
97            uint8_t clock_data[10];
98
99            struct {
100                uint8_t sec;
101                uint8_t sec_alrm;
102                uint8_t min;
103                uint8_t min_alrm;
104                uint8_t hour;
105                uint8_t hour_alrm;
106                uint8_t wday;
107                uint8_t mday;
108                uint8_t mon;
109                uint8_t year;
110            };
111        };
112
113        /** RTC status register A */
114        uint8_t stat_regA;
115
116        /** RTC status register B */
117        uint8_t stat_regB;
118
119      public:
120        RTC(const std::string &name, Malta* t, Tick i);
121
122        /** Set the initial RTC time/date */
123        void set_time(time_t t);
124
125        /** RTC address port: write address of RTC RAM data to access */
126        void writeAddr(const uint8_t data);
127
128        /** RTC write data */
129        void writeData(const uint8_t data);
130
131
132
133        /** RTC read data */
134        uint8_t readData();
135
136        /**
137          * Serialize this object to the given output stream.
138          * @param base The base name of the counter object.
139          * @param os The stream to serialize to.
140          */
141        void serialize(const std::string &base, std::ostream &os);
142
143        /**
144         * Reconstruct the state of this object from a checkpoint.
145          * @param base The base name of the counter object.
146         * @param cp The checkpoint use.
147         * @param section The section name of this object
148         */
149        void unserialize(const std::string &base, Checkpoint *cp,
150                         const std::string &section);
151    };
152
153    /** Programmable Interval Timer (Intel 8254) */
154    class PITimer
155    {
156        /** Counter element for PIT */
157        class Counter
158        {
159            /** Event for counter interrupt */
160            class CounterEvent : public Event
161            {
162              private:
163                /** Pointer back to Counter */
164                Counter* counter;
165                Tick interval;
166
167              public:
168                CounterEvent(Counter*);
169
170                /** Event process */
171                virtual void process();
172
173                /** Event description */
174                virtual const char *description();
175
176                friend class Counter;
177            };
178
179          private:
180            std::string _name;
181            const std::string &name() const { return _name; }
182
183            CounterEvent event;
184
185            /** Current count value */
186            uint16_t count;
187
188            /** Latched count */
189            uint16_t latched_count;
190
191            /** Interrupt period */
192            uint16_t period;
193
194            /** Current mode of operation */
195            uint8_t mode;
196
197            /** Output goes high when the counter reaches zero */
198            bool output_high;
199
200            /** State of the count latch */
201            bool latch_on;
202
203            /** Set of values for read_byte and write_byte */
204            enum {LSB, MSB};
205
206            /** Determine which byte of a 16-bit count value to read/write */
207            uint8_t read_byte, write_byte;
208
209          public:
210            Counter(const std::string &name);
211
212            /** Latch the current count (if one is not already latched) */
213            void latchCount();
214
215            /** Set the read/write mode */
216            void setRW(int rw_val);
217
218            /** Set operational mode */
219            void setMode(int mode_val);
220
221            /** Set count encoding */
222            void setBCD(int bcd_val);
223
224            /** Read a count byte */
225            uint8_t read();
226
227            /** Write a count byte */
228            void write(const uint8_t data);
229
230            /** Is the output high? */
231            bool outputHigh();
232
233            /**
234             * Serialize this object to the given output stream.
235             * @param base The base name of the counter object.
236             * @param os   The stream to serialize to.
237             */
238            void serialize(const std::string &base, std::ostream &os);
239
240            /**
241             * Reconstruct the state of this object from a checkpoint.
242             * @param base The base name of the counter object.
243             * @param cp The checkpoint use.
244             * @param section The section name of this object
245             */
246            void unserialize(const std::string &base, Checkpoint *cp,
247                             const std::string &section);
248        };
249
250      private:
251        std::string _name;
252        const std::string &name() const { return _name; }
253
254        /** PIT has three seperate counters */
255        Counter *counter[3];
256
257      public:
258        /** Public way to access individual counters (avoid array accesses) */
259        Counter counter0;
260        Counter counter1;
261        Counter counter2;
262
263        PITimer(const std::string &name);
264
265        /** Write control word */
266        void writeControl(const uint8_t data);
267
268        /**
269         * Serialize this object to the given output stream.
270         * @param base The base name of the counter object.
271         * @param os The stream to serialize to.
272         */
273        void serialize(const std::string &base, std::ostream &os);
274
275        /**
276         * Reconstruct the state of this object from a checkpoint.
277         * @param base The base name of the counter object.
278         * @param cp The checkpoint use.
279         * @param section The section name of this object
280         */
281        void unserialize(const std::string &base, Checkpoint *cp,
282                         const std::string &section);
283    };
284
285    /** Mask of the PIC1 */
286    uint8_t mask1;
287
288    /** Mask of the PIC2 */
289    uint8_t mask2;
290
291    /** Mode of PIC1. Not used for anything */
292    uint8_t mode1;
293
294    /** Mode of PIC2. Not used for anything */
295    uint8_t mode2;
296
297    /** Raw PIC interrupt register before masking */
298    uint8_t picr; //Raw PIC interrput register
299
300    /** Is the pic interrupting right now or not. */
301    bool picInterrupting;
302
303    /** A pointer to the Malta device which be belong to */
304    Malta *malta;
305
306    /** Intel 8253 Periodic Interval Timer */
307    PITimer pitimer;
308
309    RTC rtc;
310
311    /** The interval is set via two writes to the PIT.
312     * This variable contains a flag as to how many writes have happened, and
313     * the time so far.
314     */
315    uint16_t timerData;
316
317  public:
318    /**
319     * Return the freqency of the RTC
320     * @return interrupt rate of the RTC
321     */
322    Tick frequency() const;
323
324    typedef MaltaIOParams Params;
325
326    const Params *
327    params() const
328    {
329        return dynamic_cast<const Params *>(_params);
330    }
331
332  public:
333    /**
334     * Initialize all the data for devices supported by Malta I/O.
335     * @param p pointer to Params struct
336     */
337    MaltaIO(Params *p);
338
339    virtual Tick read(PacketPtr pkt);
340    virtual Tick write(PacketPtr pkt);
341
342
343
344    /**
345     * Serialize this object to the given output stream.
346     * @param os The stream to serialize to.
347     */
348    virtual void serialize(std::ostream &os);
349
350    /**
351     * Reconstruct the state of this object from a checkpoint.
352     * @param cp The checkpoint use.
353     * @param section The section name of this object
354     */
355    virtual void unserialize(Checkpoint *cp, const std::string &section);
356
357};
358
359#endif // __DEV_MALTA_IO_HH__
360