malta_io.hh revision 12429:beefb9f5f551 
1/*
2 * Copyright (c) 2004-2005 The Regents of The University of Michigan
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;
9 * redistributions in binary form must reproduce the above copyright
10 * notice, this list of conditions and the following disclaimer in the
11 * documentation and/or other materials provided with the distribution;
12 * neither the name of the copyright holders nor the names of its
13 * contributors may be used to endorse or promote products derived from
14 * this software without specific prior written permission.
15 *
16 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
17 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
18 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
19 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
20 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
21 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
22 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
26 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 *
28 * Authors: Ali Saidi
29 *          Andrew Schultz
30 *          Miguel Serrano
31 */
32
33/** @file
34 * Malta I/O Space mapping including RTC/timer interrupts
35 */
36
37#ifndef __DEV_MALTA_IO_HH__
38#define __DEV_MALTA_IO_HH__
39
40#include "dev/mips/malta.hh"
41#include "dev/mips/malta_cchip.hh"
42#include "dev/intel_8254_timer.hh"
43#include "dev/io_device.hh"
44#include "dev/mc146818.hh"
45#include "params/MaltaIO.hh"
46#include "sim/eventq.hh"
47
48/**
49 * Malta I/O device is a catch all for all the south bridge stuff we care
50 * to implement.
51 */
52class MaltaIO : public BasicPioDevice
53{
54  protected:
55
56    class RTC : public MC146818
57    {
58      public:
59        Malta *malta;
60        RTC(const std::string &name, const MaltaIOParams *p);
61
62      protected:
63        void handleEvent()
64        {
65            //Actually interrupt the processor here
66            malta->cchip->postRTC();
67        }
68    };
69
70    /** Mask of the PIC1 */
71    uint8_t mask1;
72
73    /** Mask of the PIC2 */
74    uint8_t mask2;
75
76    /** Mode of PIC1. Not used for anything */
77    uint8_t mode1;
78
79    /** Mode of PIC2. Not used for anything */
80    uint8_t mode2;
81
82    /** Raw PIC interrupt register before masking */
83    uint8_t picr; //Raw PIC interrput register
84
85    /** Is the pic interrupting right now or not. */
86    bool picInterrupting;
87
88    /** A pointer to the Malta device which be belong to */
89    Malta *malta;
90
91    /** Intel 8253 Periodic Interval Timer */
92    Intel8254Timer pitimer;
93
94    RTC rtc;
95
96    /** The interval is set via two writes to the PIT.
97     * This variable contains a flag as to how many writes have happened, and
98     * the time so far.
99     */
100    uint16_t timerData;
101
102  public:
103    /**
104     * Return the freqency of the RTC
105     * @return interrupt rate of the RTC
106     */
107    Tick frequency() const;
108
109    typedef MaltaIOParams Params;
110
111    const Params *
112    params() const
113    {
114        return dynamic_cast<const Params *>(_params);
115    }
116
117    /**
118     * Initialize all the data for devices supported by Malta I/O.
119     * @param p pointer to Params struct
120     */
121    MaltaIO(const Params *p);
122
123    Tick read(PacketPtr pkt) override;
124    Tick write(PacketPtr pkt) override;
125
126
127    /** Post an Interrupt to the CPU */
128    void postIntr(uint8_t interrupt);
129
130    /** Clear an Interrupt to the CPU */
131    void clearIntr(uint8_t interrupt);
132
133    void serialize(CheckpointOut &cp) const override;
134    void unserialize(CheckpointIn &cp) override;
135
136    /**
137     * Start running.
138     */
139    void startup() override;
140
141};
142
143#endif // __DEV_MALTA_IO_HH__
144