malta_io.hh revision 6379
15222Sksewell@umich.edu/*
25222Sksewell@umich.edu * Copyright (c) 2004-2005 The Regents of The University of Michigan
35222Sksewell@umich.edu * All rights reserved.
45222Sksewell@umich.edu *
55222Sksewell@umich.edu * Redistribution and use in source and binary forms, with or without
65222Sksewell@umich.edu * modification, are permitted provided that the following conditions are
75222Sksewell@umich.edu * met: redistributions of source code must retain the above copyright
85222Sksewell@umich.edu * notice, this list of conditions and the following disclaimer;
95222Sksewell@umich.edu * redistributions in binary form must reproduce the above copyright
105222Sksewell@umich.edu * notice, this list of conditions and the following disclaimer in the
115222Sksewell@umich.edu * documentation and/or other materials provided with the distribution;
125222Sksewell@umich.edu * neither the name of the copyright holders nor the names of its
135222Sksewell@umich.edu * contributors may be used to endorse or promote products derived from
145222Sksewell@umich.edu * this software without specific prior written permission.
155222Sksewell@umich.edu *
165222Sksewell@umich.edu * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
175222Sksewell@umich.edu * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
185222Sksewell@umich.edu * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
195222Sksewell@umich.edu * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
205222Sksewell@umich.edu * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
215222Sksewell@umich.edu * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
225222Sksewell@umich.edu * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
235222Sksewell@umich.edu * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
245222Sksewell@umich.edu * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
255222Sksewell@umich.edu * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
265222Sksewell@umich.edu * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
275222Sksewell@umich.edu *
285222Sksewell@umich.edu * Authors: Ali Saidi
295222Sksewell@umich.edu *          Andrew Schultz
305222Sksewell@umich.edu *          Miguel Serrano
315222Sksewell@umich.edu */
325222Sksewell@umich.edu
335222Sksewell@umich.edu/** @file
345222Sksewell@umich.edu * Malta I/O Space mapping including RTC/timer interrupts
355222Sksewell@umich.edu */
365222Sksewell@umich.edu
375222Sksewell@umich.edu#ifndef __DEV_MALTA_IO_HH__
385222Sksewell@umich.edu#define __DEV_MALTA_IO_HH__
395222Sksewell@umich.edu
405222Sksewell@umich.edu#include "base/range.hh"
415222Sksewell@umich.edu#include "dev/mips/malta.hh"
426379Sgblack@eecs.umich.edu#include "dev/intel_8254_timer.hh"
436379Sgblack@eecs.umich.edu#include "dev/io_device.hh"
446379Sgblack@eecs.umich.edu#include "dev/mc146818.hh"
456379Sgblack@eecs.umich.edu#include "params/MaltaIO.hh"
465222Sksewell@umich.edu#include "sim/eventq.hh"
475222Sksewell@umich.edu
485222Sksewell@umich.edu/**
495222Sksewell@umich.edu * Malta I/O device is a catch all for all the south bridge stuff we care
505222Sksewell@umich.edu * to implement.
515222Sksewell@umich.edu */
525222Sksewell@umich.educlass MaltaIO : public BasicPioDevice
535222Sksewell@umich.edu{
545222Sksewell@umich.edu  private:
555222Sksewell@umich.edu    struct tm tm;
565222Sksewell@umich.edu
575222Sksewell@umich.edu  protected:
586379Sgblack@eecs.umich.edu
596379Sgblack@eecs.umich.edu    class RTC : public MC146818
605222Sksewell@umich.edu    {
616379Sgblack@eecs.umich.edu      public:
626379Sgblack@eecs.umich.edu        Malta *malta;
636379Sgblack@eecs.umich.edu        RTC(const std::string &name, const MaltaIOParams *p);
646379Sgblack@eecs.umich.edu
656379Sgblack@eecs.umich.edu      protected:
666379Sgblack@eecs.umich.edu        void handleEvent()
675222Sksewell@umich.edu        {
686379Sgblack@eecs.umich.edu            //Actually interrupt the processor here
696379Sgblack@eecs.umich.edu            malta->cchip->postRTC();
706379Sgblack@eecs.umich.edu        }
715222Sksewell@umich.edu    };
725222Sksewell@umich.edu
735222Sksewell@umich.edu    /** Mask of the PIC1 */
745222Sksewell@umich.edu    uint8_t mask1;
755222Sksewell@umich.edu
765222Sksewell@umich.edu    /** Mask of the PIC2 */
775222Sksewell@umich.edu    uint8_t mask2;
785222Sksewell@umich.edu
795222Sksewell@umich.edu    /** Mode of PIC1. Not used for anything */
805222Sksewell@umich.edu    uint8_t mode1;
815222Sksewell@umich.edu
825222Sksewell@umich.edu    /** Mode of PIC2. Not used for anything */
835222Sksewell@umich.edu    uint8_t mode2;
845222Sksewell@umich.edu
855222Sksewell@umich.edu    /** Raw PIC interrupt register before masking */
865222Sksewell@umich.edu    uint8_t picr; //Raw PIC interrput register
875222Sksewell@umich.edu
885222Sksewell@umich.edu    /** Is the pic interrupting right now or not. */
895222Sksewell@umich.edu    bool picInterrupting;
905222Sksewell@umich.edu
915222Sksewell@umich.edu    /** A pointer to the Malta device which be belong to */
925222Sksewell@umich.edu    Malta *malta;
935222Sksewell@umich.edu
945222Sksewell@umich.edu    /** Intel 8253 Periodic Interval Timer */
956379Sgblack@eecs.umich.edu    Intel8254Timer pitimer;
965222Sksewell@umich.edu
975222Sksewell@umich.edu    RTC rtc;
985222Sksewell@umich.edu
995222Sksewell@umich.edu    /** The interval is set via two writes to the PIT.
1005222Sksewell@umich.edu     * This variable contains a flag as to how many writes have happened, and
1015222Sksewell@umich.edu     * the time so far.
1025222Sksewell@umich.edu     */
1035222Sksewell@umich.edu    uint16_t timerData;
1045222Sksewell@umich.edu
1055222Sksewell@umich.edu  public:
1065222Sksewell@umich.edu    /**
1075222Sksewell@umich.edu     * Return the freqency of the RTC
1085222Sksewell@umich.edu     * @return interrupt rate of the RTC
1095222Sksewell@umich.edu     */
1105222Sksewell@umich.edu    Tick frequency() const;
1115222Sksewell@umich.edu
1125222Sksewell@umich.edu    typedef MaltaIOParams Params;
1135222Sksewell@umich.edu
1145222Sksewell@umich.edu    const Params *
1155222Sksewell@umich.edu    params() const
1165222Sksewell@umich.edu    {
1175222Sksewell@umich.edu        return dynamic_cast<const Params *>(_params);
1185222Sksewell@umich.edu    }
1195222Sksewell@umich.edu
1205222Sksewell@umich.edu    /**
1215222Sksewell@umich.edu     * Initialize all the data for devices supported by Malta I/O.
1225222Sksewell@umich.edu     * @param p pointer to Params struct
1235222Sksewell@umich.edu     */
1246379Sgblack@eecs.umich.edu    MaltaIO(const Params *p);
1255222Sksewell@umich.edu
1265222Sksewell@umich.edu    virtual Tick read(PacketPtr pkt);
1275222Sksewell@umich.edu    virtual Tick write(PacketPtr pkt);
1285222Sksewell@umich.edu
1295222Sksewell@umich.edu
1306379Sgblack@eecs.umich.edu    /** Post an Interrupt to the CPU */
1316379Sgblack@eecs.umich.edu    void postIntr(uint8_t interrupt);
1326379Sgblack@eecs.umich.edu
1336379Sgblack@eecs.umich.edu    /** Clear an Interrupt to the CPU */
1346379Sgblack@eecs.umich.edu    void clearIntr(uint8_t interrupt);
1355222Sksewell@umich.edu
1365222Sksewell@umich.edu    /**
1375222Sksewell@umich.edu     * Serialize this object to the given output stream.
1385222Sksewell@umich.edu     * @param os The stream to serialize to.
1395222Sksewell@umich.edu     */
1405222Sksewell@umich.edu    virtual void serialize(std::ostream &os);
1415222Sksewell@umich.edu
1425222Sksewell@umich.edu    /**
1435222Sksewell@umich.edu     * Reconstruct the state of this object from a checkpoint.
1445222Sksewell@umich.edu     * @param cp The checkpoint use.
1455222Sksewell@umich.edu     * @param section The section name of this object
1465222Sksewell@umich.edu     */
1475222Sksewell@umich.edu    virtual void unserialize(Checkpoint *cp, const std::string &section);
1485222Sksewell@umich.edu
1495222Sksewell@umich.edu};
1505222Sksewell@umich.edu
1515222Sksewell@umich.edu#endif // __DEV_MALTA_IO_HH__
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