malta.cc revision 5478
15222Sksewell@umich.edu/*
25222Sksewell@umich.edu * Copyright (c) 2004-2005 The Regents of The University of Michigan
35222Sksewell@umich.edu * All rights reserved.
45222Sksewell@umich.edu *
55222Sksewell@umich.edu * Redistribution and use in source and binary forms, with or without
65222Sksewell@umich.edu * modification, are permitted provided that the following conditions are
75222Sksewell@umich.edu * met: redistributions of source code must retain the above copyright
85222Sksewell@umich.edu * notice, this list of conditions and the following disclaimer;
95222Sksewell@umich.edu * redistributions in binary form must reproduce the above copyright
105222Sksewell@umich.edu * notice, this list of conditions and the following disclaimer in the
115222Sksewell@umich.edu * documentation and/or other materials provided with the distribution;
125222Sksewell@umich.edu * neither the name of the copyright holders nor the names of its
135222Sksewell@umich.edu * contributors may be used to endorse or promote products derived from
145222Sksewell@umich.edu * this software without specific prior written permission.
155222Sksewell@umich.edu *
165222Sksewell@umich.edu * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
175222Sksewell@umich.edu * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
185222Sksewell@umich.edu * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
195222Sksewell@umich.edu * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
205222Sksewell@umich.edu * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
215222Sksewell@umich.edu * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
225222Sksewell@umich.edu * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
235222Sksewell@umich.edu * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
245222Sksewell@umich.edu * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
255222Sksewell@umich.edu * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
265222Sksewell@umich.edu * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
275222Sksewell@umich.edu *
285222Sksewell@umich.edu * Authors: Ali Saidi
295222Sksewell@umich.edu *          Rick Strong
305222Sksewell@umich.edu */
315222Sksewell@umich.edu
325222Sksewell@umich.edu/** @file
335222Sksewell@umich.edu * Implementation of Malta platform.
345222Sksewell@umich.edu */
355222Sksewell@umich.edu
365222Sksewell@umich.edu#include <deque>
375222Sksewell@umich.edu#include <string>
385222Sksewell@umich.edu#include <vector>
395222Sksewell@umich.edu
405222Sksewell@umich.edu#include "cpu/intr_control.hh"
415222Sksewell@umich.edu#include "dev/mips/malta_cchip.hh"
425222Sksewell@umich.edu#include "dev/mips/malta_pchip.hh"
435222Sksewell@umich.edu#include "dev/mips/malta_io.hh"
445222Sksewell@umich.edu#include "dev/mips/malta.hh"
455478Snate@binkert.org#include "dev/terminal.hh"
465222Sksewell@umich.edu#include "params/Malta.hh"
475222Sksewell@umich.edu#include "sim/system.hh"
485222Sksewell@umich.edu
495222Sksewell@umich.edu
505222Sksewell@umich.eduusing namespace std;
515222Sksewell@umich.eduusing namespace TheISA;
525222Sksewell@umich.edu
535222Sksewell@umich.eduMalta::Malta(const Params *p)
545222Sksewell@umich.edu    : Platform(p), system(p->system)
555222Sksewell@umich.edu{
565222Sksewell@umich.edu    // set the back pointer from the system to myself
575222Sksewell@umich.edu    system->platform = this;
585222Sksewell@umich.edu
595222Sksewell@umich.edu    for (int i = 0; i < Malta::Max_CPUs; i++)
605222Sksewell@umich.edu        intr_sum_type[i] = 0;
615222Sksewell@umich.edu}
625222Sksewell@umich.edu
635222Sksewell@umich.eduTick
645222Sksewell@umich.eduMalta::intrFrequency()
655222Sksewell@umich.edu{
665222Sksewell@umich.edu    return io->frequency();
675222Sksewell@umich.edu}
685222Sksewell@umich.edu
695222Sksewell@umich.eduvoid
705222Sksewell@umich.eduMalta::postConsoleInt()
715222Sksewell@umich.edu{
725222Sksewell@umich.edu     //panic("Malta::postConsoleInt() has not been implemented.");
735222Sksewell@umich.edu    io->postIntr(0x10/*HW4*/);//see {Linux-src}/arch/mips/mips-boards/sim/sim_setup.c
745222Sksewell@umich.edu}
755222Sksewell@umich.edu
765222Sksewell@umich.eduvoid
775222Sksewell@umich.eduMalta::clearConsoleInt()
785222Sksewell@umich.edu{
795222Sksewell@umich.edu        //FIXME: implement clearConsoleInt()
805222Sksewell@umich.edu        //warn("Malta::clearConsoleInt() has not been implemented.");
815222Sksewell@umich.edu    io->clearIntr(0x10/*HW4*/);
825222Sksewell@umich.edu}
835222Sksewell@umich.edu
845222Sksewell@umich.eduvoid
855222Sksewell@umich.eduMalta::postPciInt(int line)
865222Sksewell@umich.edu{
875222Sksewell@umich.edu                panic("Malta::postPciInt() has not been implemented.");
885222Sksewell@umich.edu    //cchip->postDRIR(line);
895222Sksewell@umich.edu}
905222Sksewell@umich.edu
915222Sksewell@umich.eduvoid
925222Sksewell@umich.eduMalta::clearPciInt(int line)
935222Sksewell@umich.edu{
945222Sksewell@umich.edu                panic("Malta::clearPciInt() has not been implemented.");
955222Sksewell@umich.edu    //cchip->clearDRIR(line);
965222Sksewell@umich.edu}
975222Sksewell@umich.edu
985222Sksewell@umich.eduAddr
995222Sksewell@umich.eduMalta::pciToDma(Addr pciAddr) const
1005222Sksewell@umich.edu{
1015222Sksewell@umich.edu                panic("Malta::pciToDma() has not been implemented.");
1025222Sksewell@umich.edu    return pchip->translatePciToDma(pciAddr);
1035222Sksewell@umich.edu}
1045222Sksewell@umich.edu
1055222Sksewell@umich.edu
1065222Sksewell@umich.eduAddr
1075222Sksewell@umich.eduMalta::calcConfigAddr(int bus, int dev, int func)
1085222Sksewell@umich.edu{
1095222Sksewell@umich.edu        panic("Malta::calcConfigAddr() has not been implemented.");
1105222Sksewell@umich.edu   return pchip->calcConfigAddr(bus, dev, func);
1115222Sksewell@umich.edu}
1125222Sksewell@umich.edu
1135222Sksewell@umich.eduvoid
1145222Sksewell@umich.eduMalta::serialize(std::ostream &os)
1155222Sksewell@umich.edu{
1165222Sksewell@umich.edu
1175222Sksewell@umich.edu    SERIALIZE_ARRAY(intr_sum_type, Malta::Max_CPUs);
1185222Sksewell@umich.edu}
1195222Sksewell@umich.edu
1205222Sksewell@umich.eduvoid
1215222Sksewell@umich.eduMalta::unserialize(Checkpoint *cp, const std::string &section)
1225222Sksewell@umich.edu{
1235222Sksewell@umich.edu    UNSERIALIZE_ARRAY(intr_sum_type, Malta::Max_CPUs);
1245222Sksewell@umich.edu}
1255222Sksewell@umich.edu
1265222Sksewell@umich.eduMalta *
1275222Sksewell@umich.eduMaltaParams::create()
1285222Sksewell@umich.edu{
1295222Sksewell@umich.edu    return new Malta(this);
1305222Sksewell@umich.edu}
131