mc146818.cc revision 9730
1/* 2 * Copyright (c) 2004-2005 The Regents of The University of Michigan 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions are 7 * met: redistributions of source code must retain the above copyright 8 * notice, this list of conditions and the following disclaimer; 9 * redistributions in binary form must reproduce the above copyright 10 * notice, this list of conditions and the following disclaimer in the 11 * documentation and/or other materials provided with the distribution; 12 * neither the name of the copyright holders nor the names of its 13 * contributors may be used to endorse or promote products derived from 14 * this software without specific prior written permission. 15 * 16 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 17 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 18 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 19 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 20 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 21 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 22 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 26 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 27 * 28 * Authors: Ali Saidi 29 * Andrew Schultz 30 * Miguel Serrano 31 */ 32 33#include <sys/time.h> 34 35#include <ctime> 36#include <string> 37 38#include "base/bitfield.hh" 39#include "base/time.hh" 40#include "base/trace.hh" 41#include "debug/MC146818.hh" 42#include "dev/mc146818.hh" 43#include "dev/rtcreg.h" 44 45using namespace std; 46 47static uint8_t 48bcdize(uint8_t val) 49{ 50 uint8_t result; 51 result = val % 10; 52 result += (val / 10) << 4; 53 return result; 54} 55 56static uint8_t 57unbcdize(uint8_t val) 58{ 59 uint8_t result; 60 result = val & 0xf; 61 result += (val >> 4) * 10; 62 return result; 63} 64 65void 66MC146818::setTime(const struct tm time) 67{ 68 curTime = time; 69 year = time.tm_year; 70 // Unix is 0-11 for month, data seet says start at 1 71 mon = time.tm_mon + 1; 72 mday = time.tm_mday; 73 hour = time.tm_hour; 74 min = time.tm_min; 75 sec = time.tm_sec; 76 77 // Datasheet says 1 is sunday 78 wday = time.tm_wday + 1; 79 80 if (!stat_regB.dm) { 81 // The datasheet says that the year field can be either BCD or 82 // years since 1900. Linux seems to be happy with years since 83 // 1900. 84 year = bcdize(year % 100); 85 mon = bcdize(mon); 86 mday = bcdize(mday); 87 hour = bcdize(hour); 88 min = bcdize(min); 89 sec = bcdize(sec); 90 } 91} 92 93MC146818::MC146818(EventManager *em, const string &n, const struct tm time, 94 bool bcd, Tick frequency) 95 : EventManager(em), _name(n), event(this, frequency), tickEvent(this) 96{ 97 memset(clock_data, 0, sizeof(clock_data)); 98 99 stat_regA = 0; 100 stat_regA.dv = RTCA_DV_32768HZ; 101 stat_regA.rs = RTCA_RS_1024HZ; 102 103 stat_regB = 0; 104 stat_regB.pie = 1; 105 stat_regB.format24h = 1; 106 stat_regB.dm = bcd ? 0 : 1; 107 108 setTime(time); 109 DPRINTFN("Real-time clock set to %s", asctime(&time)); 110} 111 112MC146818::~MC146818() 113{ 114 deschedule(tickEvent); 115 deschedule(event); 116} 117 118bool 119MC146818::rega_dv_disabled(const RtcRegA ®) 120{ 121 return reg.dv == RTCA_DV_DISABLED0 || 122 reg.dv == RTCA_DV_DISABLED1; 123} 124 125void 126MC146818::writeData(const uint8_t addr, const uint8_t data) 127{ 128 bool panic_unsupported(false); 129 130 if (addr < RTC_STAT_REGA) { 131 clock_data[addr] = data; 132 curTime.tm_sec = unbcdize(sec); 133 curTime.tm_min = unbcdize(min); 134 curTime.tm_hour = unbcdize(hour); 135 curTime.tm_mday = unbcdize(mday); 136 curTime.tm_mon = unbcdize(mon) - 1; 137 curTime.tm_year = ((unbcdize(year) + 50) % 100) + 1950; 138 curTime.tm_wday = unbcdize(wday) - 1; 139 } else { 140 switch (addr) { 141 case RTC_STAT_REGA: { 142 RtcRegA old_rega(stat_regA); 143 stat_regA = data; 144 // The "update in progress" bit is read only. 145 stat_regA.uip = old_rega; 146 147 if (stat_regA.dv != RTCA_DV_32768HZ) { 148 inform("RTC: Unimplemented divider configuration: %i\n", 149 stat_regA.dv); 150 panic_unsupported = true; 151 } 152 153 if (stat_regA.rs != RTCA_RS_1024HZ) { 154 inform("RTC: Unimplemented interrupt rate: %i\n", 155 stat_regA.rs); 156 panic_unsupported = true; 157 } 158 } break; 159 case RTC_STAT_REGB: 160 stat_regB = data; 161 if (stat_regB.set) { 162 inform("RTC: Updating stopping not implemented.\n"); 163 panic_unsupported = true; 164 } 165 166 if (stat_regB.aie || stat_regB.uie) { 167 inform("RTC: Unimplemented interrupt configuration: %s %s\n", 168 stat_regB.aie ? "alarm" : "", 169 stat_regB.uie ? "update" : ""); 170 panic_unsupported = true; 171 } 172 173 if (stat_regB.dm) { 174 inform("RTC: The binary interface is not fully implemented.\n"); 175 panic_unsupported = true; 176 } 177 178 if (!stat_regB.format24h) { 179 inform("RTC: The 12h time format not supported.\n"); 180 panic_unsupported = true; 181 } 182 183 if (stat_regB.dse) { 184 inform("RTC: Automatic daylight saving time not supported.\n"); 185 panic_unsupported = true; 186 } 187 188 if (stat_regB.pie) { 189 if (!event.scheduled()) 190 event.scheduleIntr(); 191 } else { 192 if (event.scheduled()) 193 deschedule(event); 194 } 195 break; 196 case RTC_STAT_REGC: 197 case RTC_STAT_REGD: 198 panic("RTC status registers C and D are not implemented.\n"); 199 break; 200 } 201 } 202 203 if (panic_unsupported) 204 panic("Unimplemented RTC configuration!\n"); 205 206} 207 208uint8_t 209MC146818::readData(uint8_t addr) 210{ 211 if (addr < RTC_STAT_REGA) 212 return clock_data[addr]; 213 else { 214 switch (addr) { 215 case RTC_STAT_REGA: 216 // toggle UIP bit for linux 217 stat_regA.uip = !stat_regA.uip; 218 return stat_regA; 219 break; 220 case RTC_STAT_REGB: 221 return stat_regB; 222 break; 223 case RTC_STAT_REGC: 224 case RTC_STAT_REGD: 225 return 0x00; 226 break; 227 default: 228 panic("Shouldn't be here"); 229 } 230 } 231} 232 233void 234MC146818::tickClock() 235{ 236 if (stat_regB.set) 237 return; 238 time_t calTime = mkutctime(&curTime); 239 calTime++; 240 setTime(*gmtime(&calTime)); 241} 242 243void 244MC146818::serialize(const string &base, ostream &os) 245{ 246 uint8_t regA_serial(stat_regA); 247 uint8_t regB_serial(stat_regB); 248 249 arrayParamOut(os, base + ".clock_data", clock_data, sizeof(clock_data)); 250 paramOut(os, base + ".stat_regA", (uint8_t)regA_serial); 251 paramOut(os, base + ".stat_regB", (uint8_t)regB_serial); 252 253 // 254 // save the timer tick and rtc clock tick values to correctly reschedule 255 // them during unserialize 256 // 257 Tick rtcTimerInterruptTickOffset = event.when() - curTick(); 258 SERIALIZE_SCALAR(rtcTimerInterruptTickOffset); 259 Tick rtcClockTickOffset = tickEvent.when() - curTick(); 260 SERIALIZE_SCALAR(rtcClockTickOffset); 261} 262 263void 264MC146818::unserialize(const string &base, Checkpoint *cp, 265 const string §ion) 266{ 267 uint8_t tmp8; 268 269 arrayParamIn(cp, section, base + ".clock_data", clock_data, 270 sizeof(clock_data)); 271 272 paramIn(cp, section, base + ".stat_regA", tmp8); 273 stat_regA = tmp8; 274 paramIn(cp, section, base + ".stat_regB", tmp8); 275 stat_regB = tmp8; 276 277 // 278 // properly schedule the timer and rtc clock events 279 // 280 Tick rtcTimerInterruptTickOffset; 281 UNSERIALIZE_SCALAR(rtcTimerInterruptTickOffset); 282 reschedule(event, curTick() + rtcTimerInterruptTickOffset); 283 Tick rtcClockTickOffset; 284 UNSERIALIZE_SCALAR(rtcClockTickOffset); 285 reschedule(tickEvent, curTick() + rtcClockTickOffset); 286} 287 288MC146818::RTCEvent::RTCEvent(MC146818 * _parent, Tick i) 289 : parent(_parent), interval(i) 290{ 291 DPRINTF(MC146818, "RTC Event Initilizing\n"); 292 parent->schedule(this, curTick() + interval); 293} 294 295void 296MC146818::RTCEvent::scheduleIntr() 297{ 298 parent->schedule(this, curTick() + interval); 299} 300 301void 302MC146818::RTCEvent::process() 303{ 304 DPRINTF(MC146818, "RTC Timer Interrupt\n"); 305 parent->schedule(this, curTick() + interval); 306 parent->handleEvent(); 307} 308 309const char * 310MC146818::RTCEvent::description() const 311{ 312 return "RTC interrupt"; 313} 314 315void 316MC146818::RTCTickEvent::process() 317{ 318 DPRINTF(MC146818, "RTC clock tick\n"); 319 parent->schedule(this, curTick() + SimClock::Int::s); 320 parent->tickClock(); 321} 322 323const char * 324MC146818::RTCTickEvent::description() const 325{ 326 return "RTC clock tick"; 327} 328