isa_fake.hh revision 2665:a124942bacb8
11897Sstever@eecs.umich.edu/* 24130Ssaidi@eecs.umich.edu * Copyright (c) 2004-2005 The Regents of The University of Michigan 31897Sstever@eecs.umich.edu * All rights reserved. 41897Sstever@eecs.umich.edu * 51897Sstever@eecs.umich.edu * Redistribution and use in source and binary forms, with or without 61897Sstever@eecs.umich.edu * modification, are permitted provided that the following conditions are 71897Sstever@eecs.umich.edu * met: redistributions of source code must retain the above copyright 81897Sstever@eecs.umich.edu * notice, this list of conditions and the following disclaimer; 91897Sstever@eecs.umich.edu * redistributions in binary form must reproduce the above copyright 101897Sstever@eecs.umich.edu * notice, this list of conditions and the following disclaimer in the 111897Sstever@eecs.umich.edu * documentation and/or other materials provided with the distribution; 121897Sstever@eecs.umich.edu * neither the name of the copyright holders nor the names of its 131897Sstever@eecs.umich.edu * contributors may be used to endorse or promote products derived from 141897Sstever@eecs.umich.edu * this software without specific prior written permission. 151897Sstever@eecs.umich.edu * 161897Sstever@eecs.umich.edu * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 171897Sstever@eecs.umich.edu * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 181897Sstever@eecs.umich.edu * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 191897Sstever@eecs.umich.edu * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 201897Sstever@eecs.umich.edu * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 211897Sstever@eecs.umich.edu * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 221897Sstever@eecs.umich.edu * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 231897Sstever@eecs.umich.edu * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 241897Sstever@eecs.umich.edu * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 251897Sstever@eecs.umich.edu * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 261897Sstever@eecs.umich.edu * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 271897Sstever@eecs.umich.edu * 281897Sstever@eecs.umich.edu * Authors: Miguel Serrano 291897Sstever@eecs.umich.edu * Ali Saidi 301897Sstever@eecs.umich.edu */ 311897Sstever@eecs.umich.edu 321897Sstever@eecs.umich.edu/** @file 331897Sstever@eecs.umich.edu * Declaration of a fake device. 344961Ssaidi@eecs.umich.edu */ 351897Sstever@eecs.umich.edu 361897Sstever@eecs.umich.edu#ifndef __ISA_FAKE_HH__ 371897Sstever@eecs.umich.edu#define __ISA_FAKE_HH__ 381897Sstever@eecs.umich.edu 397047Snate@binkert.org#include "dev/tsunami.hh" 408319Ssteve.reinhardt@amd.com#include "base/range.hh" 417047Snate@binkert.org#include "dev/io_device.hh" 428319Ssteve.reinhardt@amd.com 438811Sandreas.hansson@arm.com/** 448811Sandreas.hansson@arm.com * IsaFake is a device that returns -1 on all reads and 458811Sandreas.hansson@arm.com * accepts all writes. It is meant to be placed at an address range 468811Sandreas.hansson@arm.com * so that an mcheck doesn't occur when an os probes a piece of hw 478811Sandreas.hansson@arm.com * that doesn't exist (e.g. UARTs1-3). 488811Sandreas.hansson@arm.com */ 498811Sandreas.hansson@arm.comclass IsaFake : public BasicPioDevice 508811Sandreas.hansson@arm.com{ 518811Sandreas.hansson@arm.com public: 527047Snate@binkert.org struct Params : public BasicPioDevice::Params 538811Sandreas.hansson@arm.com { 548811Sandreas.hansson@arm.com Addr pio_size; 558811Sandreas.hansson@arm.com }; 568319Ssteve.reinhardt@amd.com protected: 578319Ssteve.reinhardt@amd.com const Params *params() const { return (const Params*)_params; } 588319Ssteve.reinhardt@amd.com 598319Ssteve.reinhardt@amd.com public: 608319Ssteve.reinhardt@amd.com /** 618319Ssteve.reinhardt@amd.com * The constructor for Tsunmami Fake just registers itself with the MMU. 628319Ssteve.reinhardt@amd.com * @param p params structure 637047Snate@binkert.org */ 648319Ssteve.reinhardt@amd.com IsaFake(Params *p); 658319Ssteve.reinhardt@amd.com 667047Snate@binkert.org /** 677047Snate@binkert.org * This read always returns -1. 688319Ssteve.reinhardt@amd.com * @param req The memory request. 698319Ssteve.reinhardt@amd.com * @param data Where to put the data. 708319Ssteve.reinhardt@amd.com */ 717047Snate@binkert.org virtual Tick read(Packet *pkt); 727047Snate@binkert.org 737047Snate@binkert.org /** 741897Sstever@eecs.umich.edu * All writes are simply ignored. 751897Sstever@eecs.umich.edu * @param req The memory request. 761897Sstever@eecs.umich.edu * @param data the data to not write. 771897Sstever@eecs.umich.edu */ 788319Ssteve.reinhardt@amd.com virtual Tick write(Packet *pkt); 798319Ssteve.reinhardt@amd.com}; 808319Ssteve.reinhardt@amd.com 818319Ssteve.reinhardt@amd.com#endif // __TSUNAMI_FAKE_HH__ 828319Ssteve.reinhardt@amd.com