isa_fake.hh revision 3814
11817SN/A/*
21817SN/A * Copyright (c) 2004-2005 The Regents of The University of Michigan
31817SN/A * All rights reserved.
41817SN/A *
51817SN/A * Redistribution and use in source and binary forms, with or without
61817SN/A * modification, are permitted provided that the following conditions are
71817SN/A * met: redistributions of source code must retain the above copyright
81817SN/A * notice, this list of conditions and the following disclaimer;
91817SN/A * redistributions in binary form must reproduce the above copyright
101817SN/A * notice, this list of conditions and the following disclaimer in the
111817SN/A * documentation and/or other materials provided with the distribution;
121817SN/A * neither the name of the copyright holders nor the names of its
131817SN/A * contributors may be used to endorse or promote products derived from
141817SN/A * this software without specific prior written permission.
151817SN/A *
161817SN/A * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
171817SN/A * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
181817SN/A * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
191817SN/A * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
201817SN/A * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
211817SN/A * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
221817SN/A * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
231817SN/A * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
241817SN/A * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
251817SN/A * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
261817SN/A * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
272665Ssaidi@eecs.umich.edu *
283499Ssaidi@eecs.umich.edu * Authors: Ali Saidi
291817SN/A */
301817SN/A
311817SN/A/** @file
321817SN/A * Declaration of a fake device.
331817SN/A */
341817SN/A
351817SN/A#ifndef __ISA_FAKE_HH__
361817SN/A#define __ISA_FAKE_HH__
371817SN/A
381817SN/A#include "base/range.hh"
391817SN/A#include "dev/io_device.hh"
403540Sgblack@eecs.umich.edu#include "dev/alpha/tsunami.hh"
413348Sbinkertn@umich.edu#include "mem/packet.hh"
421817SN/A
433814Ssaidi@eecs.umich.edu#include <string>
443814Ssaidi@eecs.umich.edu
451817SN/A/**
463499Ssaidi@eecs.umich.edu * IsaFake is a device that returns, BadAddr, 1 or 0 on all reads and
473499Ssaidi@eecs.umich.edu *  rites. It is meant to be placed at an address range
481817SN/A * so that an mcheck doesn't occur when an os probes a piece of hw
493499Ssaidi@eecs.umich.edu * that doesn't exist (e.g. UARTs1-3), or catch requests in the memory system
503499Ssaidi@eecs.umich.edu * that have no responders..
511817SN/A */
522539SN/Aclass IsaFake : public BasicPioDevice
531817SN/A{
542539SN/A  public:
552539SN/A    struct Params : public BasicPioDevice::Params
562539SN/A    {
572539SN/A        Addr pio_size;
583499Ssaidi@eecs.umich.edu        bool retBadAddr;
593814Ssaidi@eecs.umich.edu        bool updateData;
603814Ssaidi@eecs.umich.edu        uint8_t retData8;
613814Ssaidi@eecs.umich.edu        uint16_t retData16;
623814Ssaidi@eecs.umich.edu        uint32_t retData32;
633814Ssaidi@eecs.umich.edu        uint64_t retData64;
643814Ssaidi@eecs.umich.edu        std::string warnAccess;
652539SN/A    };
662539SN/A  protected:
672539SN/A    const Params *params() const { return (const Params*)_params; }
683814Ssaidi@eecs.umich.edu    uint8_t retData8;
693814Ssaidi@eecs.umich.edu    uint16_t retData16;
703814Ssaidi@eecs.umich.edu    uint32_t retData32;
713814Ssaidi@eecs.umich.edu    uint64_t retData64;
723814Ssaidi@eecs.umich.edu
731817SN/A
741817SN/A  public:
751817SN/A    /**
761817SN/A      * The constructor for Tsunmami Fake just registers itself with the MMU.
772539SN/A      * @param p params structure
781817SN/A      */
792539SN/A    IsaFake(Params *p);
801817SN/A
811817SN/A    /**
821817SN/A     * This read always returns -1.
832982Sstever@eecs.umich.edu     * @param pkt The memory request.
841817SN/A     * @param data Where to put the data.
851817SN/A     */
863349Sbinkertn@umich.edu    virtual Tick read(PacketPtr pkt);
871817SN/A
881817SN/A    /**
891817SN/A     * All writes are simply ignored.
902982Sstever@eecs.umich.edu     * @param pkt The memory request.
911817SN/A     * @param data the data to not write.
921817SN/A     */
933349Sbinkertn@umich.edu    virtual Tick write(PacketPtr pkt);
941817SN/A};
951817SN/A
963499Ssaidi@eecs.umich.edu#endif // __ISA_FAKE_HH__
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