isa_fake.cc revision 4918:3214e3694fb2 
1/*
2 * Copyright (c) 2004-2005 The Regents of The University of Michigan
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;
9 * redistributions in binary form must reproduce the above copyright
10 * notice, this list of conditions and the following disclaimer in the
11 * documentation and/or other materials provided with the distribution;
12 * neither the name of the copyright holders nor the names of its
13 * contributors may be used to endorse or promote products derived from
14 * this software without specific prior written permission.
15 *
16 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
17 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
18 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
19 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
20 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
21 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
22 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
26 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 *
28 * Authors: Ali Saidi
29 */
30
31/** @file
32 * Isa Fake Device implementation
33 */
34
35#include "base/trace.hh"
36#include "dev/isa_fake.hh"
37#include "mem/packet.hh"
38#include "mem/packet_access.hh"
39#include "sim/system.hh"
40
41using namespace std;
42
43IsaFake::IsaFake(Params *p)
44    : BasicPioDevice(p)
45{
46    if (!p->ret_bad_addr)
47        pioSize = p->pio_size;
48
49    retData8 = p->ret_data8;
50    retData16 = p->ret_data16;
51    retData32 = p->ret_data32;
52    retData64 = p->ret_data64;
53}
54
55Tick
56IsaFake::read(PacketPtr pkt)
57{
58
59    if (params()->warn_access != "")
60        warn("Device %s accessed by read to address %#x size=%d\n",
61                name(), pkt->getAddr(), pkt->getSize());
62    if (params()->ret_bad_addr) {
63        DPRINTF(Tsunami, "read to bad address va=%#x size=%d\n",
64                pkt->getAddr(), pkt->getSize());
65        pkt->setBadAddress();
66    } else {
67        assert(pkt->getAddr() >= pioAddr && pkt->getAddr() < pioAddr + pioSize);
68        DPRINTF(Tsunami, "read  va=%#x size=%d\n",
69                pkt->getAddr(), pkt->getSize());
70        switch (pkt->getSize()) {
71          case sizeof(uint64_t):
72             pkt->set(retData64);
73             break;
74          case sizeof(uint32_t):
75             pkt->set(retData32);
76             break;
77          case sizeof(uint16_t):
78             pkt->set(retData16);
79             break;
80          case sizeof(uint8_t):
81             pkt->set(retData8);
82             break;
83          default:
84            panic("invalid access size!\n");
85        }
86        pkt->makeAtomicResponse();
87    }
88    return pioDelay;
89}
90
91Tick
92IsaFake::write(PacketPtr pkt)
93{
94    if (params()->warn_access != "") {
95        uint64_t data;
96        switch (pkt->getSize()) {
97          case sizeof(uint64_t):
98            data = pkt->get<uint64_t>();
99            break;
100          case sizeof(uint32_t):
101            data = pkt->get<uint32_t>();
102            break;
103          case sizeof(uint16_t):
104            data = pkt->get<uint16_t>();
105            break;
106          case sizeof(uint8_t):
107            data = pkt->get<uint8_t>();
108            break;
109          default:
110            panic("invalid access size!\n");
111        }
112        warn("Device %s accessed by write to address %#x size=%d data=%#x\n",
113                name(), pkt->getAddr(), pkt->getSize(), data);
114    }
115    if (params()->ret_bad_addr) {
116        DPRINTF(Tsunami, "write to bad address va=%#x size=%d \n",
117                pkt->getAddr(), pkt->getSize());
118        pkt->setBadAddress();
119    } else {
120        DPRINTF(Tsunami, "write - va=%#x size=%d \n",
121                pkt->getAddr(), pkt->getSize());
122
123        if (params()->update_data) {
124            switch (pkt->getSize()) {
125              case sizeof(uint64_t):
126                retData64 = pkt->get<uint64_t>();
127                break;
128              case sizeof(uint32_t):
129                retData32 = pkt->get<uint32_t>();
130                break;
131              case sizeof(uint16_t):
132                retData16 = pkt->get<uint16_t>();
133                break;
134              case sizeof(uint8_t):
135                retData8 = pkt->get<uint8_t>();
136                break;
137              default:
138                panic("invalid access size!\n");
139            }
140        }
141        pkt->makeAtomicResponse();
142    }
143    return pioDelay;
144}
145
146IsaFake *
147IsaFakeParams::create()
148{
149    return new IsaFake(this);
150}
151