isa_fake.cc revision 3349:fec4a86fa212 
1/*
2 * Copyright (c) 2004-2005 The Regents of The University of Michigan
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;
9 * redistributions in binary form must reproduce the above copyright
10 * notice, this list of conditions and the following disclaimer in the
11 * documentation and/or other materials provided with the distribution;
12 * neither the name of the copyright holders nor the names of its
13 * contributors may be used to endorse or promote products derived from
14 * this software without specific prior written permission.
15 *
16 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
17 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
18 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
19 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
20 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
21 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
22 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
26 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 *
28 * Authors: Miguel Serrano
29 *          Ali Saidi
30 */
31
32/** @file
33 * Isa Fake Device implementation
34 */
35
36#include <deque>
37#include <string>
38#include <vector>
39
40#include "base/trace.hh"
41#include "dev/isa_fake.hh"
42#include "mem/packet.hh"
43#include "mem/packet_access.hh"
44#include "sim/builder.hh"
45#include "sim/system.hh"
46
47using namespace std;
48
49IsaFake::IsaFake(Params *p)
50    : BasicPioDevice(p)
51{
52    pioSize = p->pio_size;
53}
54
55Tick
56IsaFake::read(PacketPtr pkt)
57{
58    assert(pkt->result == Packet::Unknown);
59    assert(pkt->getAddr() >= pioAddr && pkt->getAddr() < pioAddr + pioSize);
60
61    DPRINTF(Tsunami, "read  va=%#x size=%d\n", pkt->getAddr(), pkt->getSize());
62
63    switch (pkt->getSize()) {
64         pkt->set(0xFFFFFFFFFFFFFFFFULL);
65         break;
66      case sizeof(uint32_t):
67         pkt->set((uint32_t)0xFFFFFFFF);
68         break;
69      case sizeof(uint16_t):
70         pkt->set((uint16_t)0xFFFF);
71         break;
72      case sizeof(uint8_t):
73         pkt->set((uint8_t)0xFF);
74         break;
75      default:
76        panic("invalid access size(?) for PCI configspace!\n");
77    }
78    pkt->result = Packet::Success;
79    return pioDelay;
80}
81
82Tick
83IsaFake::write(PacketPtr pkt)
84{
85    DPRINTF(Tsunami, "write - va=%#x size=%d \n", pkt->getAddr(), pkt->getSize());
86    pkt->result = Packet::Success;
87    return pioDelay;
88}
89
90BEGIN_DECLARE_SIM_OBJECT_PARAMS(IsaFake)
91
92    Param<Addr> pio_addr;
93    Param<Tick> pio_latency;
94    Param<Addr> pio_size;
95    SimObjectParam<Platform *> platform;
96    SimObjectParam<System *> system;
97
98END_DECLARE_SIM_OBJECT_PARAMS(IsaFake)
99
100BEGIN_INIT_SIM_OBJECT_PARAMS(IsaFake)
101
102    INIT_PARAM(pio_addr, "Device Address"),
103    INIT_PARAM(pio_latency, "Programmed IO latency"),
104    INIT_PARAM(pio_size, "Size of address range"),
105    INIT_PARAM(platform, "platform"),
106    INIT_PARAM(system, "system object")
107
108END_INIT_SIM_OBJECT_PARAMS(IsaFake)
109
110CREATE_SIM_OBJECT(IsaFake)
111{
112    IsaFake::Params *p = new IsaFake::Params;
113    p->name = getInstanceName();
114    p->pio_addr = pio_addr;
115    p->pio_delay = pio_latency;
116    p->pio_size = pio_size;
117    p->platform = platform;
118    p->system = system;
119    return new IsaFake(p);
120}
121
122REGISTER_SIM_OBJECT("IsaFake", IsaFake)
123