isa_fake.cc revision 10565:23593fdaadcd 
1/*
2 * Copyright (c) 2004-2005 The Regents of The University of Michigan
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;
9 * redistributions in binary form must reproduce the above copyright
10 * notice, this list of conditions and the following disclaimer in the
11 * documentation and/or other materials provided with the distribution;
12 * neither the name of the copyright holders nor the names of its
13 * contributors may be used to endorse or promote products derived from
14 * this software without specific prior written permission.
15 *
16 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
17 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
18 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
19 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
20 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
21 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
22 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
26 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 *
28 * Authors: Ali Saidi
29 */
30
31/** @file
32 * Isa Fake Device implementation
33 */
34
35#include "base/trace.hh"
36#include "debug/IsaFake.hh"
37#include "dev/isa_fake.hh"
38#include "mem/packet.hh"
39#include "mem/packet_access.hh"
40#include "sim/system.hh"
41
42using namespace std;
43
44IsaFake::IsaFake(Params *p)
45    : BasicPioDevice(p, p->ret_bad_addr ? 0 : p->pio_size)
46{
47    retData8 = p->ret_data8;
48    retData16 = p->ret_data16;
49    retData32 = p->ret_data32;
50    retData64 = p->ret_data64;
51}
52
53Tick
54IsaFake::read(PacketPtr pkt)
55{
56    pkt->makeAtomicResponse();
57
58    if (params()->warn_access != "")
59        warn("Device %s accessed by read to address %#x size=%d\n",
60                name(), pkt->getAddr(), pkt->getSize());
61    if (params()->ret_bad_addr) {
62        DPRINTF(IsaFake, "read to bad address va=%#x size=%d\n",
63                pkt->getAddr(), pkt->getSize());
64        pkt->setBadAddress();
65    } else {
66        assert(pkt->getAddr() >= pioAddr && pkt->getAddr() < pioAddr + pioSize);
67        DPRINTF(IsaFake, "read  va=%#x size=%d\n",
68                pkt->getAddr(), pkt->getSize());
69        switch (pkt->getSize()) {
70          case sizeof(uint64_t):
71             pkt->set(retData64);
72             break;
73          case sizeof(uint32_t):
74             pkt->set(retData32);
75             break;
76          case sizeof(uint16_t):
77             pkt->set(retData16);
78             break;
79          case sizeof(uint8_t):
80             pkt->set(retData8);
81             break;
82          default:
83             if (params()->fake_mem)
84                 std::memset(pkt->getPtr<uint8_t>(), 0, pkt->getSize());
85             else
86                 panic("invalid access size! Device being accessed by cache?\n");
87        }
88    }
89    return pioDelay;
90}
91
92Tick
93IsaFake::write(PacketPtr pkt)
94{
95    pkt->makeAtomicResponse();
96    if (params()->warn_access != "") {
97        uint64_t data;
98        switch (pkt->getSize()) {
99          case sizeof(uint64_t):
100            data = pkt->get<uint64_t>();
101            break;
102          case sizeof(uint32_t):
103            data = pkt->get<uint32_t>();
104            break;
105          case sizeof(uint16_t):
106            data = pkt->get<uint16_t>();
107            break;
108          case sizeof(uint8_t):
109            data = pkt->get<uint8_t>();
110            break;
111          default:
112            panic("invalid access size: %u\n", pkt->getSize());
113        }
114        warn("Device %s accessed by write to address %#x size=%d data=%#x\n",
115                name(), pkt->getAddr(), pkt->getSize(), data);
116    }
117    if (params()->ret_bad_addr) {
118        DPRINTF(IsaFake, "write to bad address va=%#x size=%d \n",
119                pkt->getAddr(), pkt->getSize());
120        pkt->setBadAddress();
121    } else {
122        DPRINTF(IsaFake, "write - va=%#x size=%d \n",
123                pkt->getAddr(), pkt->getSize());
124
125        if (params()->update_data) {
126            switch (pkt->getSize()) {
127              case sizeof(uint64_t):
128                retData64 = pkt->get<uint64_t>();
129                break;
130              case sizeof(uint32_t):
131                retData32 = pkt->get<uint32_t>();
132                break;
133              case sizeof(uint16_t):
134                retData16 = pkt->get<uint16_t>();
135                break;
136              case sizeof(uint8_t):
137                retData8 = pkt->get<uint8_t>();
138                break;
139              default:
140                panic("invalid access size!\n");
141            }
142        }
143    }
144    return pioDelay;
145}
146
147IsaFake *
148IsaFakeParams::create()
149{
150    return new IsaFake(this);
151}
152