isa_fake.cc revision 4986
11817SN/A/* 21817SN/A * Copyright (c) 2004-2005 The Regents of The University of Michigan 31817SN/A * All rights reserved. 41817SN/A * 51817SN/A * Redistribution and use in source and binary forms, with or without 61817SN/A * modification, are permitted provided that the following conditions are 71817SN/A * met: redistributions of source code must retain the above copyright 81817SN/A * notice, this list of conditions and the following disclaimer; 91817SN/A * redistributions in binary form must reproduce the above copyright 101817SN/A * notice, this list of conditions and the following disclaimer in the 111817SN/A * documentation and/or other materials provided with the distribution; 121817SN/A * neither the name of the copyright holders nor the names of its 131817SN/A * contributors may be used to endorse or promote products derived from 141817SN/A * this software without specific prior written permission. 151817SN/A * 161817SN/A * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 171817SN/A * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 181817SN/A * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 191817SN/A * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 201817SN/A * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 211817SN/A * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 221817SN/A * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 231817SN/A * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 241817SN/A * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 251817SN/A * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 261817SN/A * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 272665Ssaidi@eecs.umich.edu * 283499Ssaidi@eecs.umich.edu * Authors: Ali Saidi 291817SN/A */ 301817SN/A 311817SN/A/** @file 321817SN/A * Isa Fake Device implementation 331817SN/A */ 341817SN/A 351817SN/A#include "base/trace.hh" 362542SN/A#include "dev/isa_fake.hh" 372542SN/A#include "mem/packet.hh" 383348Sbinkertn@umich.edu#include "mem/packet_access.hh" 391817SN/A#include "sim/system.hh" 401817SN/A 411817SN/Ausing namespace std; 421817SN/A 432539SN/AIsaFake::IsaFake(Params *p) 442539SN/A : BasicPioDevice(p) 451817SN/A{ 464762Snate@binkert.org if (!p->ret_bad_addr) 473499Ssaidi@eecs.umich.edu pioSize = p->pio_size; 483499Ssaidi@eecs.umich.edu 494762Snate@binkert.org retData8 = p->ret_data8; 504762Snate@binkert.org retData16 = p->ret_data16; 514762Snate@binkert.org retData32 = p->ret_data32; 524762Snate@binkert.org retData64 = p->ret_data64; 532539SN/A} 541817SN/A 552539SN/ATick 563349Sbinkertn@umich.eduIsaFake::read(PacketPtr pkt) 572539SN/A{ 582539SN/A 594986Ssaidi@eecs.umich.edu pkt->makeAtomicResponse(); 604762Snate@binkert.org if (params()->warn_access != "") 613814Ssaidi@eecs.umich.edu warn("Device %s accessed by read to address %#x size=%d\n", 623814Ssaidi@eecs.umich.edu name(), pkt->getAddr(), pkt->getSize()); 634762Snate@binkert.org if (params()->ret_bad_addr) { 643499Ssaidi@eecs.umich.edu DPRINTF(Tsunami, "read to bad address va=%#x size=%d\n", 653499Ssaidi@eecs.umich.edu pkt->getAddr(), pkt->getSize()); 664870Sstever@eecs.umich.edu pkt->setBadAddress(); 673499Ssaidi@eecs.umich.edu } else { 683499Ssaidi@eecs.umich.edu assert(pkt->getAddr() >= pioAddr && pkt->getAddr() < pioAddr + pioSize); 693499Ssaidi@eecs.umich.edu DPRINTF(Tsunami, "read va=%#x size=%d\n", 703499Ssaidi@eecs.umich.edu pkt->getAddr(), pkt->getSize()); 713499Ssaidi@eecs.umich.edu switch (pkt->getSize()) { 723499Ssaidi@eecs.umich.edu case sizeof(uint64_t): 733814Ssaidi@eecs.umich.edu pkt->set(retData64); 743499Ssaidi@eecs.umich.edu break; 753499Ssaidi@eecs.umich.edu case sizeof(uint32_t): 763814Ssaidi@eecs.umich.edu pkt->set(retData32); 773499Ssaidi@eecs.umich.edu break; 783499Ssaidi@eecs.umich.edu case sizeof(uint16_t): 793814Ssaidi@eecs.umich.edu pkt->set(retData16); 803499Ssaidi@eecs.umich.edu break; 813499Ssaidi@eecs.umich.edu case sizeof(uint8_t): 823814Ssaidi@eecs.umich.edu pkt->set(retData8); 833499Ssaidi@eecs.umich.edu break; 843499Ssaidi@eecs.umich.edu default: 853499Ssaidi@eecs.umich.edu panic("invalid access size!\n"); 863499Ssaidi@eecs.umich.edu } 871817SN/A } 882539SN/A return pioDelay; 891817SN/A} 901817SN/A 912542SN/ATick 923349Sbinkertn@umich.eduIsaFake::write(PacketPtr pkt) 931817SN/A{ 944986Ssaidi@eecs.umich.edu pkt->makeAtomicResponse(); 954762Snate@binkert.org if (params()->warn_access != "") { 963814Ssaidi@eecs.umich.edu uint64_t data; 973814Ssaidi@eecs.umich.edu switch (pkt->getSize()) { 983814Ssaidi@eecs.umich.edu case sizeof(uint64_t): 993814Ssaidi@eecs.umich.edu data = pkt->get<uint64_t>(); 1003814Ssaidi@eecs.umich.edu break; 1013814Ssaidi@eecs.umich.edu case sizeof(uint32_t): 1023814Ssaidi@eecs.umich.edu data = pkt->get<uint32_t>(); 1033814Ssaidi@eecs.umich.edu break; 1043814Ssaidi@eecs.umich.edu case sizeof(uint16_t): 1053814Ssaidi@eecs.umich.edu data = pkt->get<uint16_t>(); 1063814Ssaidi@eecs.umich.edu break; 1073814Ssaidi@eecs.umich.edu case sizeof(uint8_t): 1083814Ssaidi@eecs.umich.edu data = pkt->get<uint8_t>(); 1093814Ssaidi@eecs.umich.edu break; 1103814Ssaidi@eecs.umich.edu default: 1113814Ssaidi@eecs.umich.edu panic("invalid access size!\n"); 1123814Ssaidi@eecs.umich.edu } 1133814Ssaidi@eecs.umich.edu warn("Device %s accessed by write to address %#x size=%d data=%#x\n", 1143814Ssaidi@eecs.umich.edu name(), pkt->getAddr(), pkt->getSize(), data); 1153814Ssaidi@eecs.umich.edu } 1164762Snate@binkert.org if (params()->ret_bad_addr) { 1173499Ssaidi@eecs.umich.edu DPRINTF(Tsunami, "write to bad address va=%#x size=%d \n", 1183499Ssaidi@eecs.umich.edu pkt->getAddr(), pkt->getSize()); 1194870Sstever@eecs.umich.edu pkt->setBadAddress(); 1203499Ssaidi@eecs.umich.edu } else { 1213499Ssaidi@eecs.umich.edu DPRINTF(Tsunami, "write - va=%#x size=%d \n", 1223499Ssaidi@eecs.umich.edu pkt->getAddr(), pkt->getSize()); 1233814Ssaidi@eecs.umich.edu 1244762Snate@binkert.org if (params()->update_data) { 1253814Ssaidi@eecs.umich.edu switch (pkt->getSize()) { 1263814Ssaidi@eecs.umich.edu case sizeof(uint64_t): 1273814Ssaidi@eecs.umich.edu retData64 = pkt->get<uint64_t>(); 1283814Ssaidi@eecs.umich.edu break; 1293814Ssaidi@eecs.umich.edu case sizeof(uint32_t): 1303814Ssaidi@eecs.umich.edu retData32 = pkt->get<uint32_t>(); 1313814Ssaidi@eecs.umich.edu break; 1323814Ssaidi@eecs.umich.edu case sizeof(uint16_t): 1333814Ssaidi@eecs.umich.edu retData16 = pkt->get<uint16_t>(); 1343814Ssaidi@eecs.umich.edu break; 1353814Ssaidi@eecs.umich.edu case sizeof(uint8_t): 1363814Ssaidi@eecs.umich.edu retData8 = pkt->get<uint8_t>(); 1373814Ssaidi@eecs.umich.edu break; 1383814Ssaidi@eecs.umich.edu default: 1393814Ssaidi@eecs.umich.edu panic("invalid access size!\n"); 1403814Ssaidi@eecs.umich.edu } 1413814Ssaidi@eecs.umich.edu } 1423499Ssaidi@eecs.umich.edu } 1433488Sktlim@umich.edu return pioDelay; 1443488Sktlim@umich.edu} 1453488Sktlim@umich.edu 1464762Snate@binkert.orgIsaFake * 1474762Snate@binkert.orgIsaFakeParams::create() 1481817SN/A{ 1494762Snate@binkert.org return new IsaFake(this); 1501817SN/A} 151