isa_fake.cc revision 3499
11817SN/A/*
21817SN/A * Copyright (c) 2004-2005 The Regents of The University of Michigan
31817SN/A * All rights reserved.
41817SN/A *
51817SN/A * Redistribution and use in source and binary forms, with or without
61817SN/A * modification, are permitted provided that the following conditions are
71817SN/A * met: redistributions of source code must retain the above copyright
81817SN/A * notice, this list of conditions and the following disclaimer;
91817SN/A * redistributions in binary form must reproduce the above copyright
101817SN/A * notice, this list of conditions and the following disclaimer in the
111817SN/A * documentation and/or other materials provided with the distribution;
121817SN/A * neither the name of the copyright holders nor the names of its
131817SN/A * contributors may be used to endorse or promote products derived from
141817SN/A * this software without specific prior written permission.
151817SN/A *
161817SN/A * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
171817SN/A * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
181817SN/A * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
191817SN/A * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
201817SN/A * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
211817SN/A * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
221817SN/A * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
231817SN/A * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
241817SN/A * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
251817SN/A * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
261817SN/A * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
272665Ssaidi@eecs.umich.edu *
283499Ssaidi@eecs.umich.edu * Authors: Ali Saidi
291817SN/A */
301817SN/A
311817SN/A/** @file
321817SN/A * Isa Fake Device implementation
331817SN/A */
341817SN/A
351817SN/A#include "base/trace.hh"
362542SN/A#include "dev/isa_fake.hh"
372542SN/A#include "mem/packet.hh"
383348Sbinkertn@umich.edu#include "mem/packet_access.hh"
391817SN/A#include "sim/builder.hh"
401817SN/A#include "sim/system.hh"
411817SN/A
421817SN/Ausing namespace std;
431817SN/A
442539SN/AIsaFake::IsaFake(Params *p)
452539SN/A    : BasicPioDevice(p)
461817SN/A{
473499Ssaidi@eecs.umich.edu    if (!params()->retBadAddr)
483499Ssaidi@eecs.umich.edu        pioSize = p->pio_size;
493499Ssaidi@eecs.umich.edu
503499Ssaidi@eecs.umich.edu    memset(&retData, p->retData, sizeof(retData));
512539SN/A}
521817SN/A
533499Ssaidi@eecs.umich.eduvoid
543499Ssaidi@eecs.umich.eduIsaFake::init()
553499Ssaidi@eecs.umich.edu{
563499Ssaidi@eecs.umich.edu    // Only init this device if it's connected to anything.
573499Ssaidi@eecs.umich.edu    if (pioPort)
583499Ssaidi@eecs.umich.edu        PioDevice::init();
593499Ssaidi@eecs.umich.edu}
603499Ssaidi@eecs.umich.edu
613499Ssaidi@eecs.umich.edu
622539SN/ATick
633349Sbinkertn@umich.eduIsaFake::read(PacketPtr pkt)
642539SN/A{
652641Sstever@eecs.umich.edu    assert(pkt->result == Packet::Unknown);
662539SN/A
673499Ssaidi@eecs.umich.edu    if (params()->retBadAddr) {
683499Ssaidi@eecs.umich.edu        DPRINTF(Tsunami, "read to bad address va=%#x size=%d\n",
693499Ssaidi@eecs.umich.edu                pkt->getAddr(), pkt->getSize());
703499Ssaidi@eecs.umich.edu        pkt->result = Packet::BadAddress;
713499Ssaidi@eecs.umich.edu    } else {
723499Ssaidi@eecs.umich.edu        assert(pkt->getAddr() >= pioAddr && pkt->getAddr() < pioAddr + pioSize);
733499Ssaidi@eecs.umich.edu        DPRINTF(Tsunami, "read  va=%#x size=%d\n",
743499Ssaidi@eecs.umich.edu                pkt->getAddr(), pkt->getSize());
753499Ssaidi@eecs.umich.edu        switch (pkt->getSize()) {
763499Ssaidi@eecs.umich.edu          case sizeof(uint64_t):
773499Ssaidi@eecs.umich.edu             pkt->set(retData);
783499Ssaidi@eecs.umich.edu             break;
793499Ssaidi@eecs.umich.edu          case sizeof(uint32_t):
803499Ssaidi@eecs.umich.edu             pkt->set((uint32_t)retData);
813499Ssaidi@eecs.umich.edu             break;
823499Ssaidi@eecs.umich.edu          case sizeof(uint16_t):
833499Ssaidi@eecs.umich.edu             pkt->set((uint16_t)retData);
843499Ssaidi@eecs.umich.edu             break;
853499Ssaidi@eecs.umich.edu          case sizeof(uint8_t):
863499Ssaidi@eecs.umich.edu             pkt->set((uint8_t)retData);
873499Ssaidi@eecs.umich.edu             break;
883499Ssaidi@eecs.umich.edu          default:
893499Ssaidi@eecs.umich.edu            panic("invalid access size!\n");
903499Ssaidi@eecs.umich.edu        }
913499Ssaidi@eecs.umich.edu        pkt->result = Packet::Success;
921817SN/A    }
932539SN/A    return pioDelay;
941817SN/A}
951817SN/A
962542SN/ATick
973349Sbinkertn@umich.eduIsaFake::write(PacketPtr pkt)
981817SN/A{
993499Ssaidi@eecs.umich.edu    if (params()->retBadAddr) {
1003499Ssaidi@eecs.umich.edu        DPRINTF(Tsunami, "write to bad address va=%#x size=%d \n",
1013499Ssaidi@eecs.umich.edu                pkt->getAddr(), pkt->getSize());
1023499Ssaidi@eecs.umich.edu        pkt->result = Packet::BadAddress;
1033499Ssaidi@eecs.umich.edu    } else {
1043499Ssaidi@eecs.umich.edu        DPRINTF(Tsunami, "write - va=%#x size=%d \n",
1053499Ssaidi@eecs.umich.edu                pkt->getAddr(), pkt->getSize());
1063499Ssaidi@eecs.umich.edu        pkt->result = Packet::Success;
1073499Ssaidi@eecs.umich.edu    }
1083488Sktlim@umich.edu    return pioDelay;
1093488Sktlim@umich.edu}
1103488Sktlim@umich.edu
1111817SN/ABEGIN_DECLARE_SIM_OBJECT_PARAMS(IsaFake)
1121817SN/A
1132539SN/A    Param<Addr> pio_addr;
1141817SN/A    Param<Tick> pio_latency;
1152539SN/A    Param<Addr> pio_size;
1163499Ssaidi@eecs.umich.edu    Param<bool> ret_bad_addr;
1173499Ssaidi@eecs.umich.edu    Param<uint8_t> ret_data;
1182539SN/A    SimObjectParam<Platform *> platform;
1192539SN/A    SimObjectParam<System *> system;
1201817SN/A
1211817SN/AEND_DECLARE_SIM_OBJECT_PARAMS(IsaFake)
1221817SN/A
1231817SN/ABEGIN_INIT_SIM_OBJECT_PARAMS(IsaFake)
1241817SN/A
1252539SN/A    INIT_PARAM(pio_addr, "Device Address"),
1262539SN/A    INIT_PARAM(pio_latency, "Programmed IO latency"),
1272539SN/A    INIT_PARAM(pio_size, "Size of address range"),
1283499Ssaidi@eecs.umich.edu    INIT_PARAM(ret_bad_addr, "Return pkt status BadAddr"),
1293499Ssaidi@eecs.umich.edu    INIT_PARAM(ret_data, "Data to return if not bad addr"),
1302539SN/A    INIT_PARAM(platform, "platform"),
1312539SN/A    INIT_PARAM(system, "system object")
1321817SN/A
1331817SN/AEND_INIT_SIM_OBJECT_PARAMS(IsaFake)
1341817SN/A
1351817SN/ACREATE_SIM_OBJECT(IsaFake)
1361817SN/A{
1372539SN/A    IsaFake::Params *p = new IsaFake::Params;
1382539SN/A    p->name = getInstanceName();
1392539SN/A    p->pio_addr = pio_addr;
1402539SN/A    p->pio_delay = pio_latency;
1412539SN/A    p->pio_size = pio_size;
1423499Ssaidi@eecs.umich.edu    p->retBadAddr = ret_bad_addr;
1433499Ssaidi@eecs.umich.edu    p->retData = ret_data;
1442539SN/A    p->platform = platform;
1452539SN/A    p->system = system;
1462539SN/A    return new IsaFake(p);
1471817SN/A}
1481817SN/A
1491817SN/AREGISTER_SIM_OBJECT("IsaFake", IsaFake)
150