io_device.cc revision 2639
1545SN/A/* 22512SN/A * Copyright (c) 2006 The Regents of The University of Michigan 3545SN/A * All rights reserved. 4545SN/A * 5545SN/A * Redistribution and use in source and binary forms, with or without 6545SN/A * modification, are permitted provided that the following conditions are 7545SN/A * met: redistributions of source code must retain the above copyright 8545SN/A * notice, this list of conditions and the following disclaimer; 9545SN/A * redistributions in binary form must reproduce the above copyright 10545SN/A * notice, this list of conditions and the following disclaimer in the 11545SN/A * documentation and/or other materials provided with the distribution; 12545SN/A * neither the name of the copyright holders nor the names of its 13545SN/A * contributors may be used to endorse or promote products derived from 14545SN/A * this software without specific prior written permission. 15545SN/A * 16545SN/A * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 17545SN/A * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 18545SN/A * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 19545SN/A * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 20545SN/A * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 21545SN/A * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 22545SN/A * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 23545SN/A * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 24545SN/A * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 25545SN/A * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 26545SN/A * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 27545SN/A */ 28545SN/A 29545SN/A#include "dev/io_device.hh" 30679SN/A#include "sim/builder.hh" 31545SN/A 322489SN/A 332497SN/APioPort::PioPort(PioDevice *dev, Platform *p) 342497SN/A : device(dev), platform(p) 352489SN/A{ } 362489SN/A 372489SN/A 382489SN/ATick 392630SN/APioPort::recvAtomic(Packet *pkt) 402489SN/A{ 412489SN/A return device->recvAtomic(pkt); 422489SN/A} 432489SN/A 442489SN/Avoid 452630SN/APioPort::recvFunctional(Packet *pkt) 462489SN/A{ 472489SN/A device->recvAtomic(pkt); 482489SN/A} 492489SN/A 502489SN/Avoid 512521SN/APioPort::getDeviceAddressRanges(AddrRangeList &resp, AddrRangeList &snoop) 522489SN/A{ 532521SN/A snoop.clear(); 542521SN/A device->addressRanges(resp); 552489SN/A} 562489SN/A 572489SN/A 582489SN/APacket * 592489SN/APioPort::recvRetry() 602489SN/A{ 612489SN/A Packet* pkt = transmitList.front(); 622489SN/A transmitList.pop_front(); 632489SN/A return pkt; 642489SN/A} 652489SN/A 662489SN/A 672384SN/Avoid 682384SN/APioPort::SendEvent::process() 692384SN/A{ 702489SN/A if (port->Port::sendTiming(packet) == Success) 712384SN/A return; 722384SN/A 732630SN/A port->transmitList.push_back(packet); 742384SN/A} 752384SN/A 762384SN/A 772384SN/Abool 782630SN/APioPort::recvTiming(Packet *pkt) 792384SN/A{ 802384SN/A device->recvAtomic(pkt); 812639Sstever@eecs.umich.edu // turn packet around to go back to requester 822639Sstever@eecs.umich.edu pkt->dest = pkt->src; 832630SN/A sendTiming(pkt, pkt->time - pkt->req->getTime()); 842384SN/A return Success; 852384SN/A} 86545SN/A 87545SN/APioDevice::~PioDevice() 88545SN/A{ 892384SN/A if (pioPort) 902489SN/A delete pioPort; 91545SN/A} 92545SN/A 932542SN/Avoid 942541SN/APioDevice::init() 952541SN/A{ 962541SN/A if (!pioPort) 972541SN/A panic("Pio port not connected to anything!"); 982541SN/A pioPort->sendStatusChange(Port::RangeChange); 992541SN/A} 1002541SN/A 1012539SN/Avoid 1022539SN/ABasicPioDevice::addressRanges(AddrRangeList &range_list) 1032539SN/A{ 1042539SN/A assert(pioSize != 0); 1052539SN/A range_list.clear(); 1062539SN/A range_list.push_back(RangeSize(pioAddr, pioSize)); 1072539SN/A} 1082539SN/A 1092489SN/A 1102565SN/ADmaPort::DmaPort(DmaDevice *dev, Platform *p) 1112565SN/A : device(dev), platform(p), pendingCount(0) 1122489SN/A{ } 1132489SN/A 1142489SN/Abool 1152630SN/ADmaPort::recvTiming(Packet *pkt) 1162384SN/A{ 1172630SN/A if (pkt->senderState) { 1182565SN/A DmaReqState *state; 1192630SN/A state = (DmaReqState*)pkt->senderState; 1202630SN/A state->completionEvent->schedule(pkt->time - pkt->req->getTime()); 1212630SN/A delete pkt->req; 1222630SN/A delete pkt; 1232569SN/A } else { 1242630SN/A delete pkt->req; 1252630SN/A delete pkt; 1262565SN/A } 1272569SN/A 1282489SN/A return Success; 1292384SN/A} 130679SN/A 1312521SN/ADmaDevice::DmaDevice(Params *p) 1322565SN/A : PioDevice(p), dmaPort(NULL) 1332565SN/A{ } 1342384SN/A 1352384SN/Avoid 1362489SN/ADmaPort::SendEvent::process() 1372489SN/A{ 1382489SN/A if (port->Port::sendTiming(packet) == Success) 1392489SN/A return; 1402489SN/A 1412630SN/A port->transmitList.push_back(packet); 1422489SN/A} 1432489SN/A 1442489SN/APacket * 1452489SN/ADmaPort::recvRetry() 1462489SN/A{ 1472489SN/A Packet* pkt = transmitList.front(); 1482489SN/A transmitList.pop_front(); 1492489SN/A return pkt; 1502489SN/A} 1512489SN/Avoid 1522565SN/ADmaPort::dmaAction(Command cmd, Addr addr, int size, Event *event, 1532565SN/A uint8_t *data) 1542384SN/A{ 1552384SN/A 1562384SN/A assert(event); 1572384SN/A 1582384SN/A int prevSize = 0; 1592384SN/A Packet basePkt; 1602532SN/A Request baseReq(false); 1612384SN/A 1622384SN/A basePkt.flags = 0; 1632384SN/A basePkt.coherence = NULL; 1642384SN/A basePkt.senderState = NULL; 1652626SN/A basePkt.dest = Packet::Broadcast; 1662384SN/A basePkt.cmd = cmd; 1672384SN/A basePkt.result = Unknown; 1682489SN/A basePkt.req = NULL; 1692532SN/A// baseReq.nicReq = true; 1702532SN/A baseReq.setTime(curTick); 1712384SN/A 1722406SN/A for (ChunkGenerator gen(addr, size, peerBlockSize()); 1732406SN/A !gen.done(); gen.next()) { 1742384SN/A Packet *pkt = new Packet(basePkt); 1752384SN/A Request *req = new Request(baseReq); 1762384SN/A pkt->addr = gen.addr(); 1772384SN/A pkt->size = gen.size(); 1782384SN/A pkt->req = req; 1792532SN/A pkt->req->setPaddr(pkt->addr); 1802532SN/A pkt->req->setSize(pkt->size); 1812384SN/A // Increment the data pointer on a write 1822566SN/A if (data) 1832566SN/A pkt->dataStatic(data + prevSize) ; 1842489SN/A prevSize += pkt->size; 1852565SN/A // Set the last bit of the dma as the final packet for this dma 1862565SN/A // and set it's completion event. 1872565SN/A if (prevSize == size) { 1882565SN/A DmaReqState *state = new DmaReqState(event, true); 1892384SN/A 1902565SN/A pkt->senderState = (void*)state; 1912565SN/A } 1922565SN/A assert(pendingCount >= 0); 1932565SN/A pendingCount++; 1942566SN/A sendDma(pkt); 1952384SN/A } 1962566SN/A // since this isn't getting used and we want a check to make sure that all 1972566SN/A // packets had data in them at some point. 1982566SN/A basePkt.dataStatic((uint8_t*)NULL); 1992384SN/A} 2002384SN/A 2012384SN/A 2022384SN/Avoid 2032566SN/ADmaPort::sendDma(Packet *pkt) 2042384SN/A{ 2052384SN/A // some kind of selction between access methods 2062384SN/A // more work is going to have to be done to make 2072384SN/A // switching actually work 2082489SN/A /* MemState state = device->platform->system->memState; 2092384SN/A 2102384SN/A if (state == Timing) { 2112384SN/A if (sendTiming(pkt) == Failure) 2122384SN/A transmitList.push_back(&packet); 2132569SN/A } else if (state == Atomic) {*/ 2142630SN/A sendAtomic(pkt); 2152566SN/A if (pkt->senderState) { 2162566SN/A DmaReqState *state = (DmaReqState*)pkt->senderState; 2172566SN/A state->completionEvent->schedule(curTick + (pkt->time - pkt->req->getTime()) +1); 2182565SN/A } 2192566SN/A pendingCount--; 2202566SN/A assert(pendingCount >= 0); 2212566SN/A delete pkt->req; 2222566SN/A delete pkt; 2232566SN/A 2242489SN/A/* } else if (state == Functional) { 2252384SN/A sendFunctional(pkt); 2262384SN/A // Is this correct??? 2272630SN/A completionEvent->schedule(pkt->req->responseTime - pkt->req->requestTime); 2282384SN/A completionEvent == NULL; 2292384SN/A } else 2302384SN/A panic("Unknown memory command state."); 2312489SN/A */ 2322384SN/A} 233545SN/A 234545SN/ADmaDevice::~DmaDevice() 235545SN/A{ 2362489SN/A if (dmaPort) 2372489SN/A delete dmaPort; 238545SN/A} 239545SN/A 240679SN/A 241