device.hh revision 11262 
1/*
2 * Copyright (c) 2012 ARM Limited
3 * All rights reserved
4 *
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software
9 * licensed hereunder.  You may use the software subject to the license
10 * terms below provided that you ensure that this notice is replicated
11 * unmodified and in its entirety in all distributions of the software,
12 * modified or unmodified, in source code or in binary form.
13 *
14 * Redistribution and use in source and binary forms, with or without
15 * modification, are permitted provided that the following conditions are
16 * met: redistributions of source code must retain the above copyright
17 * notice, this list of conditions and the following disclaimer;
18 * redistributions in binary form must reproduce the above copyright
19 * notice, this list of conditions and the following disclaimer in the
20 * documentation and/or other materials provided with the distribution;
21 * neither the name of the copyright holders nor the names of its
22 * contributors may be used to endorse or promote products derived from
23 * this software without specific prior written permission.
24 *
25 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
26 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
27 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
28 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
29 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
30 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
31 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
32 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
33 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
34 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
35 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.*
36 *
37 * Authors: Peter Enns
38 */
39
40
41/** @file
42 * All i2c devices should derive from this class.
43 */
44
45#ifndef __DEV_I2C_DEVICE_HH__
46#define __DEV_I2C_DEVICE_HH__
47
48#include "base/types.hh"
49#include "params/I2CDevice.hh"
50#include "sim/sim_object.hh"
51
52class I2CDevice : public SimObject
53{
54
55  protected:
56
57    uint8_t _addr;
58
59  public:
60
61    I2CDevice(const I2CDeviceParams* p)
62        : SimObject(p), _addr(p->i2c_addr)
63    { }
64
65    virtual ~I2CDevice() { }
66
67    /**
68     * Return the next message that the device expects to send. This
69     * will likely have side effects (e.g., incrementing a register
70     * pointer).
71     *
72     * @return 8-bit message the device has been set up to send
73     */
74    virtual uint8_t read() = 0;
75
76    /**
77     * Perform any actions triggered by an i2c write (save msg in a
78     * register, perform an interrupt, update a register pointer or
79     * command register, etc...)
80     *
81     * @param msg 8-bit message from master
82     */
83    virtual void write(uint8_t msg) = 0;
84
85    /**
86     * Perform any initialization necessary for the device when it
87     * received a start signal from the bus master (devices frequently
88     * expect the first write to be a register address)
89     */
90    virtual void i2cStart() = 0;
91
92    uint8_t i2cAddr() const { return _addr; }
93
94};
95
96#endif // __DEV_I2C_DEVICE__
97