110800SN/A/*
210800SN/A * Copyright (c) 2012 ARM Limited
310800SN/A * All rights reserved
410800SN/A *
510800SN/A * The license below extends only to copyright in the software and shall
610800SN/A * not be construed as granting a license to any other intellectual
710800SN/A * property including but not limited to intellectual property relating
810800SN/A * to a hardware implementation of the functionality of the software
910800SN/A * licensed hereunder.  You may use the software subject to the license
1010800SN/A * terms below provided that you ensure that this notice is replicated
1110800SN/A * unmodified and in its entirety in all distributions of the software,
1210800SN/A * modified or unmodified, in source code or in binary form.
1310800SN/A *
1410800SN/A * Redistribution and use in source and binary forms, with or without
1510800SN/A * modification, are permitted provided that the following conditions are
1610800SN/A * met: redistributions of source code must retain the above copyright
1710800SN/A * notice, this list of conditions and the following disclaimer;
1810800SN/A * redistributions in binary form must reproduce the above copyright
1910800SN/A * notice, this list of conditions and the following disclaimer in the
2010800SN/A * documentation and/or other materials provided with the distribution;
2110800SN/A * neither the name of the copyright holders nor the names of its
2210800SN/A * contributors may be used to endorse or promote products derived from
2310800SN/A * this software without specific prior written permission.
2410800SN/A *
2510800SN/A * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
2610800SN/A * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
2710800SN/A * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
2810800SN/A * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
2910800SN/A * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
3010800SN/A * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
3110800SN/A * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
3210800SN/A * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
3310800SN/A * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
3410800SN/A * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
3510800SN/A * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.*
3610800SN/A *
3710800SN/A * Authors: Peter Enns
3810800SN/A */
3910800SN/A
4010800SN/A
4110800SN/A/** @file
4210800SN/A * All i2c devices should derive from this class.
4310800SN/A */
4410800SN/A
4511262Sandreas.sandberg@arm.com#ifndef __DEV_I2C_DEVICE_HH__
4611262Sandreas.sandberg@arm.com#define __DEV_I2C_DEVICE_HH__
4710800SN/A
4810800SN/A#include "base/types.hh"
4910800SN/A#include "params/I2CDevice.hh"
5010800SN/A#include "sim/sim_object.hh"
5110800SN/A
5210800SN/Aclass I2CDevice : public SimObject
5310800SN/A{
5410800SN/A
5510800SN/A  protected:
5610800SN/A
5710800SN/A    uint8_t _addr;
5810800SN/A
5910800SN/A  public:
6010800SN/A
6110800SN/A    I2CDevice(const I2CDeviceParams* p)
6210800SN/A        : SimObject(p), _addr(p->i2c_addr)
6310800SN/A    { }
6410800SN/A
6510800SN/A    virtual ~I2CDevice() { }
6610800SN/A
6710800SN/A    /**
6810800SN/A     * Return the next message that the device expects to send. This
6910800SN/A     * will likely have side effects (e.g., incrementing a register
7010800SN/A     * pointer).
7110800SN/A     *
7210800SN/A     * @return 8-bit message the device has been set up to send
7310800SN/A     */
7410800SN/A    virtual uint8_t read() = 0;
7510800SN/A
7610800SN/A    /**
7710800SN/A     * Perform any actions triggered by an i2c write (save msg in a
7810800SN/A     * register, perform an interrupt, update a register pointer or
7910800SN/A     * command register, etc...)
8010800SN/A     *
8110800SN/A     * @param msg 8-bit message from master
8210800SN/A     */
8310800SN/A    virtual void write(uint8_t msg) = 0;
8410800SN/A
8510800SN/A    /**
8610800SN/A     * Perform any initialization necessary for the device when it
8710800SN/A     * received a start signal from the bus master (devices frequently
8810800SN/A     * expect the first write to be a register address)
8910800SN/A     */
9010800SN/A    virtual void i2cStart() = 0;
9110800SN/A
9210800SN/A    uint8_t i2cAddr() const { return _addr; }
9310800SN/A
9410800SN/A};
9510800SN/A
9611262Sandreas.sandberg@arm.com#endif // __DEV_I2C_DEVICE__
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