timer_sp804.cc revision 11793:ef606668d247 
1/*
2 * Copyright (c) 2010 ARM Limited
3 * All rights reserved
4 *
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software
9 * licensed hereunder.  You may use the software subject to the license
10 * terms below provided that you ensure that this notice is replicated
11 * unmodified and in its entirety in all distributions of the software,
12 * modified or unmodified, in source code or in binary form.
13 *
14 * Redistribution and use in source and binary forms, with or without
15 * modification, are permitted provided that the following conditions are
16 * met: redistributions of source code must retain the above copyright
17 * notice, this list of conditions and the following disclaimer;
18 * redistributions in binary form must reproduce the above copyright
19 * notice, this list of conditions and the following disclaimer in the
20 * documentation and/or other materials provided with the distribution;
21 * neither the name of the copyright holders nor the names of its
22 * contributors may be used to endorse or promote products derived from
23 * this software without specific prior written permission.
24 *
25 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
26 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
27 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
28 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
29 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
30 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
31 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
32 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
33 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
34 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
35 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
36 *
37 * Authors: Ali Saidi
38 */
39
40#include "dev/arm/timer_sp804.hh"
41
42#include "base/intmath.hh"
43#include "base/trace.hh"
44#include "debug/Checkpoint.hh"
45#include "debug/Timer.hh"
46#include "dev/arm/base_gic.hh"
47#include "mem/packet.hh"
48#include "mem/packet_access.hh"
49
50Sp804::Sp804(Params *p)
51    : AmbaPioDevice(p, 0xfff), gic(p->gic),
52      timer0(name() + ".timer0", this, p->int_num0, p->clock0),
53      timer1(name() + ".timer1", this, p->int_num1, p->clock1)
54{
55}
56
57Sp804::Timer::Timer(std::string __name, Sp804 *_parent, int int_num, Tick _clock)
58    : _name(__name), parent(_parent), intNum(int_num), clock(_clock), control(0x20),
59      rawInt(false), pendingInt(false), loadValue(0xffffffff), zeroEvent(this)
60{
61}
62
63
64Tick
65Sp804::read(PacketPtr pkt)
66{
67    assert(pkt->getAddr() >= pioAddr && pkt->getAddr() < pioAddr + pioSize);
68    assert(pkt->getSize() == 4);
69    Addr daddr = pkt->getAddr() - pioAddr;
70    DPRINTF(Timer, "Reading from DualTimer at offset: %#x\n", daddr);
71
72    if (daddr < Timer::Size)
73        timer0.read(pkt, daddr);
74    else if ((daddr - Timer::Size) < Timer::Size)
75        timer1.read(pkt, daddr - Timer::Size);
76    else if (!readId(pkt, ambaId, pioAddr))
77        panic("Tried to read SP804 at offset %#x that doesn't exist\n", daddr);
78    pkt->makeAtomicResponse();
79    return pioDelay;
80}
81
82
83void
84Sp804::Timer::read(PacketPtr pkt, Addr daddr)
85{
86    switch(daddr) {
87      case LoadReg:
88        pkt->set<uint32_t>(loadValue);
89        break;
90      case CurrentReg:
91        DPRINTF(Timer, "Event schedule for %d, clock=%d, prescale=%d\n",
92                zeroEvent.when(), clock, control.timerPrescale);
93        Tick time;
94        time = zeroEvent.when() - curTick();
95        time = time / clock / power(16, control.timerPrescale);
96        DPRINTF(Timer, "-- returning counter at %d\n", time);
97        pkt->set<uint32_t>(time);
98        break;
99      case ControlReg:
100        pkt->set<uint32_t>(control);
101        break;
102      case RawISR:
103        pkt->set<uint32_t>(rawInt);
104        break;
105      case MaskedISR:
106        pkt->set<uint32_t>(pendingInt);
107        break;
108      case BGLoad:
109        pkt->set<uint32_t>(loadValue);
110        break;
111      default:
112        panic("Tried to read SP804 timer at offset %#x\n", daddr);
113        break;
114    }
115    DPRINTF(Timer, "Reading %#x from Timer at offset: %#x\n", pkt->get<uint32_t>(), daddr);
116}
117
118Tick
119Sp804::write(PacketPtr pkt)
120{
121    assert(pkt->getAddr() >= pioAddr && pkt->getAddr() < pioAddr + pioSize);
122    assert(pkt->getSize() == 4);
123    Addr daddr = pkt->getAddr() - pioAddr;
124    DPRINTF(Timer, "Writing to DualTimer at offset: %#x\n", daddr);
125
126    if (daddr < Timer::Size)
127        timer0.write(pkt, daddr);
128    else if ((daddr - Timer::Size) < Timer::Size)
129        timer1.write(pkt, daddr - Timer::Size);
130    else if (!readId(pkt, ambaId, pioAddr))
131        panic("Tried to write SP804 at offset %#x that doesn't exist\n", daddr);
132    pkt->makeAtomicResponse();
133    return pioDelay;
134}
135
136void
137Sp804::Timer::write(PacketPtr pkt, Addr daddr)
138{
139    DPRINTF(Timer, "Writing %#x to Timer at offset: %#x\n", pkt->get<uint32_t>(), daddr);
140    switch (daddr) {
141      case LoadReg:
142        loadValue = pkt->get<uint32_t>();
143        restartCounter(loadValue);
144        break;
145      case CurrentReg:
146        // Spec says this value can't be written, but linux writes it anyway
147        break;
148      case ControlReg:
149        bool old_enable;
150        old_enable = control.timerEnable;
151        control = pkt->get<uint32_t>();
152        if ((old_enable == 0) && control.timerEnable)
153            restartCounter(loadValue);
154        break;
155      case IntClear:
156        rawInt = false;
157        if (pendingInt) {
158            pendingInt = false;
159            DPRINTF(Timer, "Clearing interrupt\n");
160            parent->gic->clearInt(intNum);
161        }
162        break;
163      case BGLoad:
164        loadValue = pkt->get<uint32_t>();
165        break;
166      default:
167        panic("Tried to write SP804 timer at offset %#x\n", daddr);
168        break;
169    }
170}
171
172void
173Sp804::Timer::restartCounter(uint32_t val)
174{
175    DPRINTF(Timer, "Resetting counter with value %#x\n", val);
176    if (!control.timerEnable)
177        return;
178
179    Tick time = clock * power(16, control.timerPrescale);
180    if (control.timerSize)
181        time *= val;
182    else
183        time *= bits(val,15,0);
184
185    if (zeroEvent.scheduled()) {
186        DPRINTF(Timer, "-- Event was already schedule, de-scheduling\n");
187        parent->deschedule(zeroEvent);
188    }
189    parent->schedule(zeroEvent, curTick() + time);
190    DPRINTF(Timer, "-- Scheduling new event for: %d\n", curTick() + time);
191}
192
193void
194Sp804::Timer::counterAtZero()
195{
196    if (!control.timerEnable)
197        return;
198
199    DPRINTF(Timer, "Counter reached zero\n");
200
201    rawInt = true;
202    bool old_pending = pendingInt;
203    if (control.intEnable)
204        pendingInt = true;
205    if (pendingInt && !old_pending) {
206        DPRINTF(Timer, "-- Causing interrupt\n");
207        parent->gic->sendInt(intNum);
208    }
209
210    if (control.oneShot)
211        return;
212
213    // Free-running
214    if (control.timerMode == 0)
215        restartCounter(0xffffffff);
216    else
217        restartCounter(loadValue);
218}
219
220void
221Sp804::Timer::serialize(CheckpointOut &cp) const
222{
223    DPRINTF(Checkpoint, "Serializing Arm Sp804\n");
224
225    uint32_t control_serial = control;
226    SERIALIZE_SCALAR(control_serial);
227
228    SERIALIZE_SCALAR(rawInt);
229    SERIALIZE_SCALAR(pendingInt);
230    SERIALIZE_SCALAR(loadValue);
231
232    bool is_in_event = zeroEvent.scheduled();
233    SERIALIZE_SCALAR(is_in_event);
234
235    Tick event_time;
236    if (is_in_event){
237        event_time = zeroEvent.when();
238        SERIALIZE_SCALAR(event_time);
239    }
240}
241
242void
243Sp804::Timer::unserialize(CheckpointIn &cp)
244{
245    DPRINTF(Checkpoint, "Unserializing Arm Sp804\n");
246
247    uint32_t control_serial;
248    UNSERIALIZE_SCALAR(control_serial);
249    control = control_serial;
250
251    UNSERIALIZE_SCALAR(rawInt);
252    UNSERIALIZE_SCALAR(pendingInt);
253    UNSERIALIZE_SCALAR(loadValue);
254
255    bool is_in_event;
256    UNSERIALIZE_SCALAR(is_in_event);
257
258    Tick event_time;
259    if (is_in_event){
260        UNSERIALIZE_SCALAR(event_time);
261        parent->schedule(zeroEvent, event_time);
262    }
263}
264
265
266
267void
268Sp804::serialize(CheckpointOut &cp) const
269{
270    timer0.serializeSection(cp, "timer0");
271    timer1.serializeSection(cp, "timer1");
272}
273
274void
275Sp804::unserialize(CheckpointIn &cp)
276{
277    timer0.unserializeSection(cp, "timer0");
278    timer1.unserializeSection(cp, "timer1");
279}
280
281Sp804 *
282Sp804Params::create()
283{
284    return new Sp804(this);
285}
286