timer_cpulocal.hh revision 11168:f98eb2da15a4 
1/*
2 * Copyright (c) 2010-2011 ARM Limited
3 * All rights reserved
4 *
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software
9 * licensed hereunder.  You may use the software subject to the license
10 * terms below provided that you ensure that this notice is replicated
11 * unmodified and in its entirety in all distributions of the software,
12 * modified or unmodified, in source code or in binary form.
13 *
14 * Redistribution and use in source and binary forms, with or without
15 * modification, are permitted provided that the following conditions are
16 * met: redistributions of source code must retain the above copyright
17 * notice, this list of conditions and the following disclaimer;
18 * redistributions in binary form must reproduce the above copyright
19 * notice, this list of conditions and the following disclaimer in the
20 * documentation and/or other materials provided with the distribution;
21 * neither the name of the copyright holders nor the names of its
22 * contributors may be used to endorse or promote products derived from
23 * this software without specific prior written permission.
24 *
25 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
26 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
27 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
28 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
29 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
30 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
31 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
32 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
33 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
34 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
35 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
36 *
37 * Authors: Ali Saidi
38 *          Geoffrey Blake
39 */
40
41#ifndef __DEV_ARM_LOCALTIMER_HH__
42#define __DEV_ARM_LOCALTIMER_HH__
43
44#include "base/bitunion.hh"
45#include "dev/io_device.hh"
46#include "params/CpuLocalTimer.hh"
47
48/** @file
49 * This implements the cpu local timer from the Cortex-A9 MPCore
50 * Technical Reference Manual rev r2p2 (ARM DDI 0407F)
51 */
52
53class BaseGic;
54
55class CpuLocalTimer : public BasicPioDevice
56{
57  protected:
58    class Timer : public Serializable
59    {
60
61      public:
62        enum {
63            TimerLoadReg    	   = 0x00,
64            TimerCounterReg 	   = 0x04,
65            TimerControlReg 	   = 0x08,
66            TimerIntStatusReg      = 0x0C,
67            WatchdogLoadReg        = 0x20,
68            WatchdogCounterReg     = 0x24,
69            WatchdogControlReg     = 0x28,
70            WatchdogIntStatusReg   = 0x2C,
71            WatchdogResetStatusReg = 0x30,
72            WatchdogDisableReg     = 0x34,
73            Size                   = 0x38
74        };
75
76        BitUnion32(TimerCtrl)
77            Bitfield<0>   enable;
78            Bitfield<1>   autoReload;
79            Bitfield<2>   intEnable;
80            Bitfield<7,3> reserved;
81            Bitfield<15,8> prescalar;
82        EndBitUnion(TimerCtrl)
83
84        BitUnion32(WatchdogCtrl)
85            Bitfield<0>   enable;
86            Bitfield<1>   autoReload;
87            Bitfield<2>   intEnable;
88            Bitfield<3>   watchdogMode;
89            Bitfield<7,4> reserved;
90            Bitfield<15,8> prescalar;
91        EndBitUnion(WatchdogCtrl)
92
93      protected:
94        std::string _name;
95
96        /** Pointer to parent class */
97        CpuLocalTimer *parent;
98
99        /** Number of interrupt to cause/clear */
100        uint32_t intNumTimer;
101        uint32_t intNumWatchdog;
102
103        /** Cpu this timer is attached to */
104        uint32_t cpuNum;
105
106        /** Control register as specified above */
107        TimerCtrl timerControl;
108        WatchdogCtrl watchdogControl;
109
110        /** If timer has caused an interrupt. This is irrespective of
111         * interrupt enable */
112        bool rawIntTimer;
113        bool rawIntWatchdog;
114        bool rawResetWatchdog;
115        uint32_t watchdogDisableReg;
116
117        /** If an interrupt is currently pending. Logical and of Timer or
118          * Watchdog Ctrl.enable and rawIntTimer or rawIntWatchdog */
119        bool pendingIntTimer;
120        bool pendingIntWatchdog;
121
122        /** Value to load into counters when periodic mode reaches 0 */
123        uint32_t timerLoadValue;
124        uint32_t watchdogLoadValue;
125
126        /** Called when the counter reaches 0 */
127        void timerAtZero();
128        EventWrapper<Timer, &Timer::timerAtZero> timerZeroEvent;
129
130        void watchdogAtZero();
131        EventWrapper<Timer, &Timer::watchdogAtZero> watchdogZeroEvent;
132      public:
133        /** Restart the counter ticking at val
134         * @param val the value to start at */
135        void restartTimerCounter(uint32_t val);
136        void restartWatchdogCounter(uint32_t val);
137
138        Timer();
139
140        std::string name() const { return _name; }
141
142        /** Handle read for a single timer */
143        void read(PacketPtr pkt, Addr daddr);
144
145        /** Handle write for a single timer */
146        void write(PacketPtr pkt, Addr daddr);
147
148        void serialize(CheckpointOut &cp) const override;
149        void unserialize(CheckpointIn &cp) override;
150
151        friend class CpuLocalTimer;
152    };
153
154    static const int CPU_MAX = 8;
155
156    /** Pointer to the GIC for causing an interrupt */
157    BaseGic *gic;
158
159    /** Timers that do the actual work */
160    Timer localTimer[CPU_MAX];
161
162  public:
163    typedef CpuLocalTimerParams Params;
164    const Params *
165    params() const
166    {
167        return dynamic_cast<const Params *>(_params);
168    }
169    /**
170      * The constructor for RealView just registers itself with the MMU.
171      * @param p params structure
172      */
173    CpuLocalTimer(Params *p);
174
175    /**
176     * Handle a read to the device
177     * @param pkt The memory request.
178     * @return Returns latency of device read
179     */
180    virtual Tick read(PacketPtr pkt);
181
182    /**
183     * Handle a write to the device.
184     * @param pkt The memory request.
185     * @return Returns latency of device write
186     */
187    virtual Tick write(PacketPtr pkt);
188
189    void serialize(CheckpointOut &cp) const override;
190    void unserialize(CheckpointIn &cp) override;
191};
192
193
194#endif // __DEV_ARM_SP804_HH__
195
196