smmu_v3_cmdexec.cc revision 14039:4991b2a345a1 
1/*
2 * Copyright (c) 2013, 2018-2019 ARM Limited
3 * All rights reserved
4 *
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software
9 * licensed hereunder.  You may use the software subject to the license
10 * terms below provided that you ensure that this notice is replicated
11 * unmodified and in its entirety in all distributions of the software,
12 * modified or unmodified, in source code or in binary form.
13 *
14 * Redistribution and use in source and binary forms, with or without
15 * modification, are permitted provided that the following conditions are
16 * met: redistributions of source code must retain the above copyright
17 * notice, this list of conditions and the following disclaimer;
18 * redistributions in binary form must reproduce the above copyright
19 * notice, this list of conditions and the following disclaimer in the
20 * documentation and/or other materials provided with the distribution;
21 * neither the name of the copyright holders nor the names of its
22 * contributors may be used to endorse or promote products derived from
23 * this software without specific prior written permission.
24 *
25 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
26 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
27 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
28 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
29 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
30 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
31 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
32 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
33 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
34 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
35 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
36 *
37 * Authors: Stan Czerniawski
38 */
39
40#include "dev/arm/smmu_v3_cmdexec.hh"
41
42#include "base/bitfield.hh"
43#include "dev/arm/smmu_v3.hh"
44
45void
46SMMUCommandExecProcess::main(Yield &yield)
47{
48    SMMUAction a;
49    a.type = ACTION_INITIAL_NOP;
50    a.pkt = NULL;
51    a.ifc = nullptr;
52    a.delay = 0;
53    yield(a);
54
55    while (true) {
56        busy = true;
57
58        while (true) {
59            int sizeMask =
60                mask(smmu.regs.cmdq_base & Q_BASE_SIZE_MASK) & Q_CONS_PROD_MASK;
61
62            if ((smmu.regs.cmdq_cons & sizeMask) ==
63                    (smmu.regs.cmdq_prod & sizeMask))
64                break; // command queue empty
65
66            Addr cmdAddr =
67                (smmu.regs.cmdq_base & Q_BASE_ADDR_MASK) +
68                (smmu.regs.cmdq_cons & sizeMask) * sizeof(SMMUCommand);
69
70            // This deliberately resets the error field in cmdq_cons!
71            smmu.regs.cmdq_cons = (smmu.regs.cmdq_cons + 1) & sizeMask;
72
73            doRead(yield, cmdAddr, &cmd, sizeof(SMMUCommand));
74            smmu.processCommand(cmd);
75        }
76
77        busy = false;
78
79        doSleep(yield);
80    }
81}
82