rv_ctrl.cc revision 7950 
1/*
2 * Copyright (c) 2010 ARM Limited
3 * All rights reserved
4 *
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software
9 * licensed hereunder.  You may use the software subject to the license
10 * terms below provided that you ensure that this notice is replicated
11 * unmodified and in its entirety in all distributions of the software,
12 * modified or unmodified, in source code or in binary form.
13 *
14 * Redistribution and use in source and binary forms, with or without
15 * modification, are permitted provided that the following conditions are
16 * met: redistributions of source code must retain the above copyright
17 * notice, this list of conditions and the following disclaimer;
18 * redistributions in binary form must reproduce the above copyright
19 * notice, this list of conditions and the following disclaimer in the
20 * documentation and/or other materials provided with the distribution;
21 * neither the name of the copyright holders nor the names of its
22 * contributors may be used to endorse or promote products derived from
23 * this software without specific prior written permission.
24 *
25 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
26 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
27 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
28 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
29 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
30 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
31 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
32 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
33 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
34 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
35 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
36 *
37 * Authors: Ali Saidi
38 */
39
40#include "base/trace.hh"
41#include "dev/arm/rv_ctrl.hh"
42#include "mem/packet.hh"
43#include "mem/packet_access.hh"
44
45RealViewCtrl::RealViewCtrl(Params *p)
46    : BasicPioDevice(p)
47{
48    pioSize = 0xD4;
49}
50
51Tick
52RealViewCtrl::read(PacketPtr pkt)
53{
54    assert(pkt->getAddr() >= pioAddr && pkt->getAddr() < pioAddr + pioSize);
55    assert(pkt->getSize() == 4);
56    Addr daddr = pkt->getAddr() - pioAddr;
57    pkt->allocate();
58
59    switch(daddr) {
60      case ProcId:
61        pkt->set(params()->proc_id);
62        break;
63      case Clock24:
64        Tick clk;
65        clk = (Tick)(curTick() / (24 * SimClock::Float::MHz));
66        pkt->set((uint32_t)(clk));
67        break;
68      case Flash:
69        pkt->set<uint32_t>(0);
70        break;
71      case Clcd:
72        pkt->set<uint32_t>(0x00001F00);
73        break;
74      case Osc0:
75        pkt->set<uint32_t>(0x00012C5C);
76        break;
77      case Osc1:
78        pkt->set<uint32_t>(0x00002CC0);
79        break;
80      case Osc2:
81        pkt->set<uint32_t>(0x00002C75);
82        break;
83      case Osc3:
84        pkt->set<uint32_t>(0x00020211);
85        break;
86      case Osc4:
87        pkt->set<uint32_t>(0x00002C75);
88        break;
89      case Lock:
90        pkt->set<uint32_t>(sysLock);
91        break;
92      default:
93        panic("Tried to read RealView I/O at offset %#x that doesn't exist\n", daddr);
94        break;
95    }
96    pkt->makeAtomicResponse();
97    return pioDelay;
98
99}
100
101Tick
102RealViewCtrl::write(PacketPtr pkt)
103{
104    assert(pkt->getAddr() >= pioAddr && pkt->getAddr() < pioAddr + pioSize);
105
106    Addr daddr = pkt->getAddr() - pioAddr;
107    switch (daddr) {
108      case Flash:
109      case Clcd:
110      case Osc0:
111      case Osc1:
112      case Osc2:
113      case Osc3:
114      case Osc4:
115        break;
116      case Lock:
117        sysLock.lockVal = pkt->get<uint16_t>();
118        break;
119      default:
120        panic("Tried to write RVIO at offset %#x that doesn't exist\n", daddr);
121        break;
122    }
123    pkt->makeAtomicResponse();
124    return pioDelay;
125}
126
127void
128RealViewCtrl::serialize(std::ostream &os)
129{
130}
131
132void
133RealViewCtrl::unserialize(Checkpoint *cp, const std::string &section)
134{
135}
136
137RealViewCtrl *
138RealViewCtrlParams::create()
139{
140    return new RealViewCtrl(this);
141}
142