pl111.hh revision 9086:496304c8017d 
1/*
2 * Copyright (c) 2010 ARM Limited
3 * All rights reserved
4 *
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software
9 * licensed hereunder.  You may use the software subject to the license
10 * terms below provided that you ensure that this notice is replicated
11 * unmodified and in its entirety in all distributions of the software,
12 * modified or unmodified, in source code or in binary form.
13 *
14 * Redistribution and use in source and binary forms, with or without
15 * modification, are permitted provided that the following conditions are
16 * met: redistributions of source code must retain the above copyright
17 * notice, this list of conditions and the following disclaimer;
18 * redistributions in binary form must reproduce the above copyright
19 * notice, this list of conditions and the following disclaimer in the
20 * documentation and/or other materials provided with the distribution;
21 * neither the name of the copyright holders nor the names of its
22 * contributors may be used to endorse or promote products derived from
23 * this software without specific prior written permission.
24 *
25 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
26 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
27 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
28 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
29 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
30 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
31 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
32 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
33 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
34 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
35 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
36 *
37 * Authors: William Wang
38 *          Ali Saidi
39 */
40
41
42/** @file
43 * Implementiation of a PL111 CLCD controller
44 */
45
46#ifndef __DEV_ARM_PL111_HH__
47#define __DEV_ARM_PL111_HH__
48
49#include <fstream>
50
51#include "base/range.hh"
52#include "dev/arm/amba_device.hh"
53#include "params/Pl111.hh"
54#include "sim/serialize.hh"
55
56class Gic;
57class VncServer;
58class Bitmap;
59
60class Pl111: public AmbaDmaDevice
61{
62  protected:
63    static const uint64_t AMBA_ID       = ULL(0xb105f00d00141111);
64    /** ARM PL111 register map*/
65    static const int LcdTiming0       = 0x000;
66    static const int LcdTiming1       = 0x004;
67    static const int LcdTiming2       = 0x008;
68    static const int LcdTiming3       = 0x00C;
69    static const int LcdUpBase        = 0x010;
70    static const int LcdLpBase        = 0x014;
71    static const int LcdControl       = 0x018;
72    static const int LcdImsc          = 0x01C;
73    static const int LcdRis           = 0x020;
74    static const int LcdMis           = 0x024;
75    static const int LcdIcr           = 0x028;
76    static const int LcdUpCurr        = 0x02C;
77    static const int LcdLpCurr        = 0x030;
78    static const int LcdPalette       = 0x200;
79    static const int CrsrImage        = 0x800;
80    static const int ClcdCrsrCtrl     = 0xC00;
81    static const int ClcdCrsrConfig   = 0xC04;
82    static const int ClcdCrsrPalette0 = 0xC08;
83    static const int ClcdCrsrPalette1 = 0xC0C;
84    static const int ClcdCrsrXY       = 0xC10;
85    static const int ClcdCrsrClip     = 0xC14;
86    static const int ClcdCrsrImsc     = 0xC20;
87    static const int ClcdCrsrIcr      = 0xC24;
88    static const int ClcdCrsrRis      = 0xC28;
89    static const int ClcdCrsrMis      = 0xC2C;
90
91    static const int LcdPaletteSize   = 128;
92    static const int CrsrImageSize    = 256;
93
94    static const int LcdMaxWidth      = 1024; // pixels per line
95    static const int LcdMaxHeight     = 768;  // lines per panel
96
97    static const int dmaSize            = 8;    // 64 bits
98    static const int maxOutstandingDma  = 16;   // 16 deep FIFO of 64 bits
99
100    enum LcdMode {
101        bpp1 = 0,
102        bpp2,
103        bpp4,
104        bpp8,
105        bpp16,
106        bpp24,
107        bpp16m565,
108        bpp12
109    };
110
111    BitUnion8(InterruptReg)
112        Bitfield<1> underflow;
113        Bitfield<2> baseaddr;
114        Bitfield<3> vcomp;
115        Bitfield<4> ahbmaster;
116    EndBitUnion(InterruptReg)
117
118    BitUnion32(TimingReg0)
119        Bitfield<7,2> ppl;
120        Bitfield<15,8> hsw;
121        Bitfield<23,16> hfp;
122        Bitfield<31,24> hbp;
123    EndBitUnion(TimingReg0)
124
125    BitUnion32(TimingReg1)
126        Bitfield<9,0> lpp;
127        Bitfield<15,10> vsw;
128        Bitfield<23,16> vfp;
129        Bitfield<31,24> vbp;
130    EndBitUnion(TimingReg1)
131
132    BitUnion32(TimingReg2)
133        Bitfield<4,0> pcdlo;
134        Bitfield<5> clksel;
135        Bitfield<10,6> acb;
136        Bitfield<11> avs;
137        Bitfield<12> ihs;
138        Bitfield<13> ipc;
139        Bitfield<14> ioe;
140        Bitfield<25,16> cpl;
141        Bitfield<26> bcd;
142        Bitfield<31,27> pcdhi;
143    EndBitUnion(TimingReg2)
144
145    BitUnion32(TimingReg3)
146        Bitfield<6,0> led;
147        Bitfield<16> lee;
148    EndBitUnion(TimingReg3)
149
150    BitUnion32(ControlReg)
151        Bitfield<0> lcden;
152        Bitfield<3,1> lcdbpp;
153        Bitfield<4> lcdbw;
154        Bitfield<5> lcdtft;
155        Bitfield<6> lcdmono8;
156        Bitfield<7> lcddual;
157        Bitfield<8> bgr;
158        Bitfield<9> bebo;
159        Bitfield<10> bepo;
160        Bitfield<11> lcdpwr;
161        Bitfield<13,12> lcdvcomp;
162        Bitfield<16> watermark;
163    EndBitUnion(ControlReg)
164
165    /** Horizontal axis panel control register */
166    TimingReg0 lcdTiming0;
167
168    /** Vertical axis panel control register */
169    TimingReg1 lcdTiming1;
170
171    /** Clock and signal polarity control register */
172    TimingReg2 lcdTiming2;
173
174    /** Line end control register */
175    TimingReg3 lcdTiming3;
176
177    /** Upper panel frame base address register */
178    int lcdUpbase;
179
180    /** Lower panel frame base address register */
181    int lcdLpbase;
182
183    /** Control register */
184    ControlReg lcdControl;
185
186    /** Interrupt mask set/clear register */
187    InterruptReg lcdImsc;
188
189    /** Raw interrupt status register - const */
190    InterruptReg lcdRis;
191
192    /** Masked interrupt status register */
193    InterruptReg lcdMis;
194
195    /** 256x16-bit color palette registers
196     * 256 palette entries organized as 128 locations of two entries per word */
197    int lcdPalette[LcdPaletteSize];
198
199    /** Cursor image RAM register
200     * 256-word wide values defining images overlaid by the hw cursor mechanism */
201    int cursorImage[CrsrImageSize];
202
203    /** Cursor control register */
204    int clcdCrsrCtrl;
205
206    /** Cursor configuration register */
207    int clcdCrsrConfig;
208
209    /** Cursor palette registers */
210    int clcdCrsrPalette0;
211    int clcdCrsrPalette1;
212
213    /** Cursor XY position register */
214    int clcdCrsrXY;
215
216    /** Cursor clip position register */
217    int clcdCrsrClip;
218
219    /** Cursor interrupt mask set/clear register */
220    InterruptReg clcdCrsrImsc;
221
222    /** Cursor interrupt clear register */
223    InterruptReg clcdCrsrIcr;
224
225    /** Cursor raw interrupt status register - const */
226    InterruptReg clcdCrsrRis;
227
228    /** Cursor masked interrupt status register - const */
229    InterruptReg clcdCrsrMis;
230
231    /** Clock speed */
232    Tick clock;
233
234    /** VNC server */
235    VncServer *vncserver;
236
237    /** Helper to write out bitmaps */
238    Bitmap *bmp;
239
240    /** Picture of what the current frame buffer looks like */
241    std::ostream *pic;
242
243    /** Frame buffer width - pixels per line */
244    uint16_t width;
245
246    /** Frame buffer height - lines per panel */
247    uint16_t height;
248
249    /** Bytes per pixel */
250    uint8_t bytesPerPixel;
251
252    /** CLCDC supports up to 1024x768 */
253    uint8_t *dmaBuffer;
254
255    /** Start time for frame buffer dma read */
256    Tick startTime;
257
258    /** Frame buffer base address */
259    Addr startAddr;
260
261    /** Frame buffer max address */
262    Addr maxAddr;
263
264    /** Frame buffer current address */
265    Addr curAddr;
266
267    /** DMA FIFO watermark */
268    int waterMark;
269
270    /** Number of pending dma reads */
271    int dmaPendingNum;
272
273    /** Send updated parameters to the vnc server */
274    void updateVideoParams();
275
276    /** DMA framebuffer read */
277    void readFramebuffer();
278
279    /** Generate dma framebuffer read event */
280    void generateReadEvent();
281
282    /** Function to generate interrupt */
283    void generateInterrupt();
284
285    /** fillFIFO event */
286    void fillFifo();
287
288    /** start the dmas off after power is enabled */
289    void startDma();
290
291    /** DMA done event */
292    void dmaDone();
293
294    /** Next cycle event */
295    Tick nextCycle();
296    Tick nextCycle(Tick beginTick);
297
298    /** DMA framebuffer read event */
299    EventWrapper<Pl111, &Pl111::readFramebuffer> readEvent;
300
301    /** Fill fifo */
302    EventWrapper<Pl111, &Pl111::fillFifo> fillFifoEvent;
303
304    /** DMA done event */
305    std::vector<EventWrapper<Pl111, &Pl111::dmaDone> > dmaDoneEvent;
306
307    /** Wrapper to create an event out of the interrupt */
308    EventWrapper<Pl111, &Pl111::generateInterrupt> intEvent;
309
310  public:
311    typedef Pl111Params Params;
312
313    const Params *
314    params() const
315    {
316        return dynamic_cast<const Params *>(_params);
317    }
318    Pl111(const Params *p);
319    ~Pl111();
320
321    virtual Tick read(PacketPtr pkt);
322    virtual Tick write(PacketPtr pkt);
323
324    virtual void serialize(std::ostream &os);
325    virtual void unserialize(Checkpoint *cp, const std::string &section);
326
327    /**
328     * Determine the address ranges that this device responds to.
329     *
330     * @return a list of non-overlapping address ranges
331     */
332    AddrRangeList getAddrRanges();
333};
334
335#endif
336