pl111.hh revision 8711 
1/*
2 * Copyright (c) 2010 ARM Limited
3 * All rights reserved
4 *
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software
9 * licensed hereunder.  You may use the software subject to the license
10 * terms below provided that you ensure that this notice is replicated
11 * unmodified and in its entirety in all distributions of the software,
12 * modified or unmodified, in source code or in binary form.
13 *
14 * Redistribution and use in source and binary forms, with or without
15 * modification, are permitted provided that the following conditions are
16 * met: redistributions of source code must retain the above copyright
17 * notice, this list of conditions and the following disclaimer;
18 * redistributions in binary form must reproduce the above copyright
19 * notice, this list of conditions and the following disclaimer in the
20 * documentation and/or other materials provided with the distribution;
21 * neither the name of the copyright holders nor the names of its
22 * contributors may be used to endorse or promote products derived from
23 * this software without specific prior written permission.
24 *
25 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
26 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
27 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
28 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
29 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
30 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
31 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
32 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
33 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
34 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
35 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
36 *
37 * Authors: William Wang
38 *          Ali Saidi
39 */
40
41
42/** @file
43 * Implementiation of a PL111 CLCD controller
44 */
45
46#ifndef __DEV_ARM_PL111_HH__
47#define __DEV_ARM_PL111_HH__
48
49#include <fstream>
50
51#include "base/range.hh"
52#include "dev/arm/amba_device.hh"
53#include "params/Pl111.hh"
54#include "sim/serialize.hh"
55
56using namespace std;
57
58class Gic;
59class VncServer;
60class Bitmap;
61
62class Pl111: public AmbaDmaDevice
63{
64  protected:
65    static const uint64_t AMBA_ID       = ULL(0xb105f00d00141111);
66    /** ARM PL111 register map*/
67    static const int LcdTiming0       = 0x000;
68    static const int LcdTiming1       = 0x004;
69    static const int LcdTiming2       = 0x008;
70    static const int LcdTiming3       = 0x00C;
71    static const int LcdUpBase        = 0x010;
72    static const int LcdLpBase        = 0x014;
73    static const int LcdControl       = 0x018;
74    static const int LcdImsc          = 0x01C;
75    static const int LcdRis           = 0x020;
76    static const int LcdMis           = 0x024;
77    static const int LcdIcr           = 0x028;
78    static const int LcdUpCurr        = 0x02C;
79    static const int LcdLpCurr        = 0x030;
80    static const int LcdPalette       = 0x200;
81    static const int CrsrImage        = 0x800;
82    static const int ClcdCrsrCtrl     = 0xC00;
83    static const int ClcdCrsrConfig   = 0xC04;
84    static const int ClcdCrsrPalette0 = 0xC08;
85    static const int ClcdCrsrPalette1 = 0xC0C;
86    static const int ClcdCrsrXY       = 0xC10;
87    static const int ClcdCrsrClip     = 0xC14;
88    static const int ClcdCrsrImsc     = 0xC20;
89    static const int ClcdCrsrIcr      = 0xC24;
90    static const int ClcdCrsrRis      = 0xC28;
91    static const int ClcdCrsrMis      = 0xC2C;
92
93    static const int LcdPaletteSize   = 128;
94    static const int CrsrImageSize    = 256;
95
96    static const int LcdMaxWidth      = 1024; // pixels per line
97    static const int LcdMaxHeight     = 768;  // lines per panel
98
99    static const int dmaSize            = 8;    // 64 bits
100    static const int maxOutstandingDma  = 16;   // 16 deep FIFO of 64 bits
101
102    enum LcdMode {
103        bpp1 = 0,
104        bpp2,
105        bpp4,
106        bpp8,
107        bpp16,
108        bpp24,
109        bpp16m565,
110        bpp12
111    };
112
113    BitUnion8(InterruptReg)
114        Bitfield<1> underflow;
115        Bitfield<2> baseaddr;
116        Bitfield<3> vcomp;
117        Bitfield<4> ahbmaster;
118    EndBitUnion(InterruptReg)
119
120    BitUnion32(TimingReg0)
121        Bitfield<7,2> ppl;
122        Bitfield<15,8> hsw;
123        Bitfield<23,16> hfp;
124        Bitfield<31,24> hbp;
125    EndBitUnion(TimingReg0)
126
127    BitUnion32(TimingReg1)
128        Bitfield<9,0> lpp;
129        Bitfield<15,10> vsw;
130        Bitfield<23,16> vfp;
131        Bitfield<31,24> vbp;
132    EndBitUnion(TimingReg1)
133
134    BitUnion32(TimingReg2)
135        Bitfield<4,0> pcdlo;
136        Bitfield<5> clksel;
137        Bitfield<10,6> acb;
138        Bitfield<11> avs;
139        Bitfield<12> ihs;
140        Bitfield<13> ipc;
141        Bitfield<14> ioe;
142        Bitfield<25,16> cpl;
143        Bitfield<26> bcd;
144        Bitfield<31,27> pcdhi;
145    EndBitUnion(TimingReg2)
146
147    BitUnion32(TimingReg3)
148        Bitfield<6,0> led;
149        Bitfield<16> lee;
150    EndBitUnion(TimingReg3)
151
152    BitUnion32(ControlReg)
153        Bitfield<0> lcden;
154        Bitfield<3,1> lcdbpp;
155        Bitfield<4> lcdbw;
156        Bitfield<5> lcdtft;
157        Bitfield<6> lcdmono8;
158        Bitfield<7> lcddual;
159        Bitfield<8> bgr;
160        Bitfield<9> bebo;
161        Bitfield<10> bepo;
162        Bitfield<11> lcdpwr;
163        Bitfield<13,12> lcdvcomp;
164        Bitfield<16> watermark;
165    EndBitUnion(ControlReg)
166
167    /** Horizontal axis panel control register */
168    TimingReg0 lcdTiming0;
169
170    /** Vertical axis panel control register */
171    TimingReg1 lcdTiming1;
172
173    /** Clock and signal polarity control register */
174    TimingReg2 lcdTiming2;
175
176    /** Line end control register */
177    TimingReg3 lcdTiming3;
178
179    /** Upper panel frame base address register */
180    int lcdUpbase;
181
182    /** Lower panel frame base address register */
183    int lcdLpbase;
184
185    /** Control register */
186    ControlReg lcdControl;
187
188    /** Interrupt mask set/clear register */
189    InterruptReg lcdImsc;
190
191    /** Raw interrupt status register - const */
192    InterruptReg lcdRis;
193
194    /** Masked interrupt status register */
195    InterruptReg lcdMis;
196
197    /** 256x16-bit color palette registers
198     * 256 palette entries organized as 128 locations of two entries per word */
199    int lcdPalette[LcdPaletteSize];
200
201    /** Cursor image RAM register
202     * 256-word wide values defining images overlaid by the hw cursor mechanism */
203    int cursorImage[CrsrImageSize];
204
205    /** Cursor control register */
206    int clcdCrsrCtrl;
207
208    /** Cursor configuration register */
209    int clcdCrsrConfig;
210
211    /** Cursor palette registers */
212    int clcdCrsrPalette0;
213    int clcdCrsrPalette1;
214
215    /** Cursor XY position register */
216    int clcdCrsrXY;
217
218    /** Cursor clip position register */
219    int clcdCrsrClip;
220
221    /** Cursor interrupt mask set/clear register */
222    InterruptReg clcdCrsrImsc;
223
224    /** Cursor interrupt clear register */
225    InterruptReg clcdCrsrIcr;
226
227    /** Cursor raw interrupt status register - const */
228    InterruptReg clcdCrsrRis;
229
230    /** Cursor masked interrupt status register - const */
231    InterruptReg clcdCrsrMis;
232
233    /** Clock speed */
234    Tick clock;
235
236    /** VNC server */
237    VncServer *vncserver;
238
239    /** Helper to write out bitmaps */
240    Bitmap *bmp;
241
242    /** Picture of what the current frame buffer looks like */
243    std::ostream *pic;
244
245    /** Frame buffer width - pixels per line */
246    uint16_t width;
247
248    /** Frame buffer height - lines per panel */
249    uint16_t height;
250
251    /** Bytes per pixel */
252    uint8_t bytesPerPixel;
253
254    /** CLCDC supports up to 1024x768 */
255    uint8_t *dmaBuffer;
256
257    /** Start time for frame buffer dma read */
258    Tick startTime;
259
260    /** Frame buffer base address */
261    Addr startAddr;
262
263    /** Frame buffer max address */
264    Addr maxAddr;
265
266    /** Frame buffer current address */
267    Addr curAddr;
268
269    /** DMA FIFO watermark */
270    int waterMark;
271
272    /** Number of pending dma reads */
273    int dmaPendingNum;
274
275    /** Send updated parameters to the vnc server */
276    void updateVideoParams();
277
278    /** DMA framebuffer read */
279    void readFramebuffer();
280
281    /** Generate dma framebuffer read event */
282    void generateReadEvent();
283
284    /** Function to generate interrupt */
285    void generateInterrupt();
286
287    /** fillFIFO event */
288    void fillFifo();
289
290    /** start the dmas off after power is enabled */
291    void startDma();
292
293    /** DMA done event */
294    void dmaDone();
295
296    /** Next cycle event */
297    Tick nextCycle();
298    Tick nextCycle(Tick beginTick);
299
300    /** DMA framebuffer read event */
301    EventWrapper<Pl111, &Pl111::readFramebuffer> readEvent;
302
303    /** Fill fifo */
304    EventWrapper<Pl111, &Pl111::fillFifo> fillFifoEvent;
305
306    /** DMA done event */
307    vector<EventWrapper<Pl111, &Pl111::dmaDone> > dmaDoneEvent;
308
309    /** Wrapper to create an event out of the interrupt */
310    EventWrapper<Pl111, &Pl111::generateInterrupt> intEvent;
311
312  public:
313    typedef Pl111Params Params;
314
315    const Params *
316    params() const
317    {
318        return dynamic_cast<const Params *>(_params);
319    }
320    Pl111(const Params *p);
321
322    virtual Tick read(PacketPtr pkt);
323    virtual Tick write(PacketPtr pkt);
324
325    virtual void serialize(std::ostream &os);
326    virtual void unserialize(Checkpoint *cp, const std::string &section);
327
328    /**
329     * Determine the address ranges that this device responds to.
330     *
331     * @return a list of non-overlapping address ranges
332     */
333    AddrRangeList getAddrRanges();
334};
335
336#endif
337