gic_v3_distributor.hh revision 13531
18528SN/A/* 28528SN/A * Copyright (c) 2018 Metempsy Technology Consulting 38528SN/A * All rights reserved. 49988Snilay@cs.wisc.edu * 58825Snilay@cs.wisc.edu * Redistribution and use in source and binary forms, with or without 69988Snilay@cs.wisc.edu * modification, are permitted provided that the following conditions are 78528SN/A * met: redistributions of source code must retain the above copyright 88528SN/A * notice, this list of conditions and the following disclaimer; 98528SN/A * redistributions in binary form must reproduce the above copyright 108528SN/A * notice, this list of conditions and the following disclaimer in the 118528SN/A * documentation and/or other materials provided with the distribution; 128528SN/A * neither the name of the copyright holders nor the names of its 1310315Snilay@cs.wisc.edu * contributors may be used to endorse or promote products derived from 1410513SAli.Saidi@ARM.com * this software without specific prior written permission. 1511167Sjthestness@gmail.com * 1610513SAli.Saidi@ARM.com * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 179885Sstever@gmail.com * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 189885Sstever@gmail.com * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 1911167Sjthestness@gmail.com * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 209055Ssaidi@eecs.umich.edu * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 219348SAli.Saidi@ARM.com * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 229988Snilay@cs.wisc.edu * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 2310513SAli.Saidi@ARM.com * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 2410513SAli.Saidi@ARM.com * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 2510038SAli.Saidi@ARM.com * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 2610038SAli.Saidi@ARM.com * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 2710038SAli.Saidi@ARM.com * 2810038SAli.Saidi@ARM.com * Authors: Jairo Balart 2910038SAli.Saidi@ARM.com */ 308528SN/A 3111167Sjthestness@gmail.com#ifndef __DEV_ARM_GICV3_DISTRIBUTOR_H__ 3210315Snilay@cs.wisc.edu#define __DEV_ARM_GICV3_DISTRIBUTOR_H__ 338528SN/A 3410513SAli.Saidi@ARM.com#include "base/addr_range.hh" 3510513SAli.Saidi@ARM.com#include "dev/arm/gic_v3.hh" 368528SN/A#include "sim/serialize.hh" 3710513SAli.Saidi@ARM.com 3810791Ssteve.reinhardt@amd.comclass Gicv3Distributor : public Serializable 3910791Ssteve.reinhardt@amd.com{ 409079SAli.Saidi@ARM.com private: 4111167Sjthestness@gmail.com 428660SN/A friend class Gicv3Redistributor; 439661SAli.Saidi@ARM.com friend class Gicv3CPUInterface; 449661SAli.Saidi@ARM.com 4510038SAli.Saidi@ARM.com protected: 4611167Sjthestness@gmail.com 4710038SAli.Saidi@ARM.com Gicv3 * gic; 488528SN/A const uint32_t itLines; 498528SN/A 508528SN/A enum { 518528SN/A // Control Register 528528SN/A GICD_CTLR = 0x0000, 538528SN/A // Interrupt Controller Type Register 548528SN/A GICD_TYPER = 0x0004, 558528SN/A // Implementer Identification Register 5610513SAli.Saidi@ARM.com GICD_IIDR = 0x0008, 578528SN/A // Error Reporting Status Register 588528SN/A GICD_STATUSR = 0x0010, 598528SN/A // Peripheral ID0 Register 609885Sstever@gmail.com GICD_PIDR0 = 0xffe0, 618528SN/A // Peripheral ID1 Register 629988Snilay@cs.wisc.edu GICD_PIDR1 = 0xffe4, 6310513SAli.Saidi@ARM.com // Peripheral ID2 Register 648721SN/A GICD_PIDR2 = 0xffe8, 658721SN/A // Peripheral ID3 Register 668891SAli.Saidi@ARM.com GICD_PIDR3 = 0xffec, 678891SAli.Saidi@ARM.com // Peripheral ID4 Register 688528SN/A GICD_PIDR4 = 0xffd0, 698528SN/A // Peripheral ID5 Register 708528SN/A GICD_PIDR5 = 0xffd4, 718528SN/A // Peripheral ID6 Register 728528SN/A GICD_PIDR6 = 0xffd8, 738528SN/A // Peripheral ID7 Register 749988Snilay@cs.wisc.edu GICD_PIDR7 = 0xffdc, 758528SN/A }; 768528SN/A 778528SN/A // Interrupt Group Registers 788528SN/A static const AddrRange GICD_IGROUPR; 798528SN/A // Interrupt Set-Enable Registers 808528SN/A static const AddrRange GICD_ISENABLER; 819988Snilay@cs.wisc.edu // Interrupt Clear-Enable Registers 828528SN/A static const AddrRange GICD_ICENABLER; 838528SN/A // Interrupt Set-Pending Registers 848528SN/A static const AddrRange GICD_ISPENDR; 858528SN/A // Interrupt Clear-Pending Registers 868528SN/A static const AddrRange GICD_ICPENDR; 878528SN/A // Interrupt Set-Active Registers 889988Snilay@cs.wisc.edu static const AddrRange GICD_ISACTIVER; 8911167Sjthestness@gmail.com // Interrupt Clear-Active Registers 908528SN/A static const AddrRange GICD_ICACTIVER; 918528SN/A // Interrupt Priority Registers 929885Sstever@gmail.com static const AddrRange GICD_IPRIORITYR; 939885Sstever@gmail.com // Interrupt Processor Targets Registers 949885Sstever@gmail.com static const AddrRange GICD_ITARGETSR; // GICv2 legacy 9510315Snilay@cs.wisc.edu // Interrupt Configuration Registers 969988Snilay@cs.wisc.edu static const AddrRange GICD_ICFGR; 9710315Snilay@cs.wisc.edu // Interrupt Group Modifier Registers 989885Sstever@gmail.com static const AddrRange GICD_IGRPMODR; 999885Sstever@gmail.com // Non-secure Access Control Registers 1008528SN/A static const AddrRange GICD_NSACR; 1018528SN/A // SGI Clear-Pending Registers 10210451Snilay@cs.wisc.edu static const AddrRange GICD_CPENDSGIR; // GICv2 legacy 1038528SN/A // SGI Set-Pending Registers 10410451Snilay@cs.wisc.edu static const AddrRange GICD_SPENDSGIR; // GICv2 legacy 1058528SN/A // Interrupt Routing Registers 10610451Snilay@cs.wisc.edu static const AddrRange GICD_IROUTER; 10710451Snilay@cs.wisc.edu 1088528SN/A BitUnion64(IROUTER) 1098528SN/A Bitfield<63, 40> res0_1; 1108528SN/A Bitfield<39, 32> Aff3; 1119481Snilay@cs.wisc.edu Bitfield<31> IRM; 1128528SN/A Bitfield<30, 24> res0_2; 1138528SN/A Bitfield<23, 16> Aff2; 1149885Sstever@gmail.com Bitfield<15, 8> Aff1; 1158528SN/A Bitfield<7, 0> Aff0; 1168528SN/A EndBitUnion(IROUTER) 1178528SN/A 1188528SN/A static const uint32_t GICD_CTLR_ENABLEGRP0 = 1 << 0; 1198528SN/A static const uint32_t GICD_CTLR_ENABLEGRP1NS = 1 << 1; 1208528SN/A static const uint32_t GICD_CTLR_ENABLEGRP1S = 1 << 2; 1218528SN/A static const uint32_t GICD_CTLR_ENABLEGRP1 = 1 << 0; 12210451Snilay@cs.wisc.edu static const uint32_t GICD_CTLR_ENABLEGRP1A = 1 << 1; 12310451Snilay@cs.wisc.edu static const uint32_t GICD_CTLR_DS = 1 << 6; 12410451Snilay@cs.wisc.edu 1258528SN/A bool ARE; 1268528SN/A bool DS; 1278528SN/A bool EnableGrp1S; 12810038SAli.Saidi@ARM.com bool EnableGrp1NS; 1298528SN/A bool EnableGrp0; 1309988Snilay@cs.wisc.edu std::vector <uint8_t> irqGroup; 13110451Snilay@cs.wisc.edu std::vector <bool> irqEnabled; 13210451Snilay@cs.wisc.edu std::vector <bool> irqPending; 13310451Snilay@cs.wisc.edu std::vector <bool> irqActive; 1348528SN/A std::vector <uint8_t> irqPriority; 13510451Snilay@cs.wisc.edu std::vector <Gicv3::IntTriggerType> irqConfig; 1368528SN/A std::vector <uint8_t> irqGrpmod; 1378528SN/A std::vector <uint8_t> irqNsacr; 1388528SN/A std::vector <IROUTER> irqAffinityRouting; 1398528SN/A 1408528SN/A public: 1418528SN/A 1428528SN/A static const uint32_t ADDR_RANGE_SIZE = 0x10000; 1438528SN/A 1448528SN/A Gicv3Distributor(Gicv3 * gic, uint32_t it_lines); 1459449SAli.Saidi@ARM.com ~Gicv3Distributor(); 1468528SN/A void init(); 1478528SN/A void initState(); 14810038SAli.Saidi@ARM.com 1498528SN/A uint64_t read(Addr addr, size_t size, bool is_secure_access); 1508528SN/A void write(Addr addr, uint64_t data, size_t size, 1518528SN/A bool is_secure_access); 1528528SN/A void serialize(CheckpointOut & cp) const override; 1538528SN/A void unserialize(CheckpointIn & cp) override; 1548825Snilay@cs.wisc.edu 15510451Snilay@cs.wisc.edu bool 15610451Snilay@cs.wisc.edu groupEnabled(Gicv3::GroupId group) 15710451Snilay@cs.wisc.edu { 15810451Snilay@cs.wisc.edu if (DS == 0) { 15910451Snilay@cs.wisc.edu switch (group) { 1608528SN/A case Gicv3::G0S: 1618528SN/A return EnableGrp0; 1628528SN/A 1638528SN/A case Gicv3::G1S: 1648528SN/A return EnableGrp1S; 1658528SN/A 16610451Snilay@cs.wisc.edu case Gicv3::G1NS: 1678528SN/A return EnableGrp1NS; 16810451Snilay@cs.wisc.edu 1699661SAli.Saidi@ARM.com default: 1708528SN/A panic("Gicv3Distributor::groupEnabled(): " 1718528SN/A "invalid group!\n"); 1728528SN/A } 1738528SN/A } else { 1748528SN/A switch (group) { 1758528SN/A case Gicv3::G0S: 1768528SN/A return EnableGrp0; 1778528SN/A 1788528SN/A case Gicv3::G1S: 17910242Ssteve.reinhardt@amd.com case Gicv3::G1NS: 1808528SN/A return EnableGrp1NS; 1818528SN/A 1829449SAli.Saidi@ARM.com default: 1838528SN/A panic("Gicv3Distributor::groupEnabled(): " 1848528SN/A "invalid group!\n"); 1858528SN/A } 1868528SN/A } 1878825Snilay@cs.wisc.edu } 1888528SN/A 1898528SN/A void sendInt(uint32_t int_id); 1908528SN/A void intDeasserted(uint32_t int_id); 1919481Snilay@cs.wisc.edu Gicv3::IntStatus intStatus(uint32_t int_id); 19210791Ssteve.reinhardt@amd.com void updateAndInformCPUInterfaces(); 19310451Snilay@cs.wisc.edu void update(); 19410451Snilay@cs.wisc.edu void fullUpdate(); 1959481Snilay@cs.wisc.edu void activateIRQ(uint32_t int_id); 1969481Snilay@cs.wisc.edu void deactivateIRQ(uint32_t int_id); 1979481Snilay@cs.wisc.edu 1989988Snilay@cs.wisc.edu inline bool isNotSPI(uint8_t int_id) 1999481Snilay@cs.wisc.edu { 2009481Snilay@cs.wisc.edu if (int_id < (Gicv3::SGI_MAX + Gicv3::PPI_MAX) || int_id >= itLines) { 2019481Snilay@cs.wisc.edu return true; 2029481Snilay@cs.wisc.edu } else { 2039481Snilay@cs.wisc.edu return false; 2048528SN/A } 20511103Snilay@cs.wisc.edu } 2069885Sstever@gmail.com 2078891SAli.Saidi@ARM.com inline bool nsAccessToSecInt(uint8_t int_id, bool is_secure_access) 20810451Snilay@cs.wisc.edu { 2099885Sstever@gmail.com return !DS && !is_secure_access && getIntGroup(int_id) != Gicv3::G1NS; 21010791Ssteve.reinhardt@amd.com } 2119988Snilay@cs.wisc.edu 2128528SN/A protected: 2139348SAli.Saidi@ARM.com 21410900Snilay@cs.wisc.edu void reset(); 2158528SN/A Gicv3::GroupId getIntGroup(int int_id); 21610451Snilay@cs.wisc.edu}; 2178528SN/A 2188835SAli.Saidi@ARM.com#endif //__DEV_ARM_GICV3_DISTRIBUTOR_H__ 2199348SAli.Saidi@ARM.com