gic_v3.cc revision 13877 
1/*
2 * Copyright (c) 2018 Metempsy Technology Consulting
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;
9 * redistributions in binary form must reproduce the above copyright
10 * notice, this list of conditions and the following disclaimer in the
11 * documentation and/or other materials provided with the distribution;
12 * neither the name of the copyright holders nor the names of its
13 * contributors may be used to endorse or promote products derived from
14 * this software without specific prior written permission.
15 *
16 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
17 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
18 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
19 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
20 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
21 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
22 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
26 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 *
28 * Authors: Jairo Balart
29 */
30
31#include "dev/arm/gic_v3.hh"
32
33#include "cpu/intr_control.hh"
34#include "debug/GIC.hh"
35#include "debug/Interrupt.hh"
36#include "dev/arm/gic_v3_cpu_interface.hh"
37#include "dev/arm/gic_v3_distributor.hh"
38#include "dev/arm/gic_v3_redistributor.hh"
39#include "dev/platform.hh"
40#include "mem/packet.hh"
41#include "mem/packet_access.hh"
42
43Gicv3::Gicv3(const Params * p)
44    : BaseGic(p)
45{
46}
47
48void
49Gicv3::init()
50{
51    distRange = RangeSize(params()->dist_addr,
52                          Gicv3Distributor::ADDR_RANGE_SIZE - 1);
53    redistRange = RangeSize(params()->redist_addr,
54        Gicv3Redistributor::ADDR_RANGE_SIZE * sys->numContexts() - 1);
55    addrRanges = {distRange, redistRange};
56    BaseGic::init();
57    distributor = new Gicv3Distributor(this, params()->it_lines);
58    redistributors.resize(sys->numContexts(), nullptr);
59    cpuInterfaces.resize(sys->numContexts(), nullptr);
60
61    panic_if(sys->numContexts() > params()->cpu_max,
62        "Exceeding maximum number of PEs supported by GICv3: "
63        "using %u while maximum is %u\n", sys->numContexts(),
64        params()->cpu_max);
65
66    for (int i = 0; i < sys->numContexts(); i++) {
67        redistributors[i] = new Gicv3Redistributor(this, i);
68        cpuInterfaces[i] = new Gicv3CPUInterface(this, i);
69    }
70
71    distributor->init();
72
73    for (int i = 0; i < sys->numContexts(); i++) {
74        redistributors[i]->init();
75        cpuInterfaces[i]->init();
76    }
77}
78
79void
80Gicv3::initState()
81{
82    distributor->initState();
83
84    for (int i = 0; i < sys->numContexts(); i++) {
85        redistributors[i]->initState();
86        cpuInterfaces[i]->initState();
87    }
88}
89
90Tick
91Gicv3::read(PacketPtr pkt)
92{
93    const Addr addr = pkt->getAddr();
94    const size_t size = pkt->getSize();
95    bool is_secure_access = pkt->isSecure();
96    uint64_t resp = 0;
97    Tick delay = 0;
98
99    if (distRange.contains(addr)) {
100        const Addr daddr = addr - distRange.start();
101        panic_if(!distributor, "Distributor is null!");
102        resp = distributor->read(daddr, size, is_secure_access);
103        delay = params()->dist_pio_delay;
104        DPRINTF(GIC, "Gicv3::read(): (distributor) context_id %d register %#x "
105                "size %d is_secure_access %d (value %#x)\n",
106                pkt->req->contextId(), daddr, size, is_secure_access, resp);
107    } else if (redistRange.contains(addr)) {
108        Addr daddr = addr - redistRange.start();
109        uint32_t redistributor_id =
110            daddr / Gicv3Redistributor::ADDR_RANGE_SIZE;
111        daddr = daddr % Gicv3Redistributor::ADDR_RANGE_SIZE;
112        panic_if(redistributor_id >= redistributors.size(),
113                 "Invalid redistributor_id!");
114        panic_if(!redistributors[redistributor_id], "Redistributor is null!");
115        resp = redistributors[redistributor_id]->read(daddr, size,
116                                                      is_secure_access);
117        delay = params()->redist_pio_delay;
118        DPRINTF(GIC, "Gicv3::read(): (redistributor %d) context_id %d "
119                "register %#x size %d is_secure_access %d (value %#x)\n",
120                redistributor_id, pkt->req->contextId(), daddr, size,
121                is_secure_access, resp);
122    } else {
123        panic("Gicv3::read(): unknown address %#x\n", addr);
124    }
125
126    pkt->setUintX(resp, LittleEndianByteOrder);
127    pkt->makeAtomicResponse();
128    return delay;
129}
130
131Tick
132Gicv3::write(PacketPtr pkt)
133{
134    const size_t size = pkt->getSize();
135    uint64_t data = pkt->getUintX(LittleEndianByteOrder);
136    const Addr addr = pkt->getAddr();
137    bool is_secure_access = pkt->isSecure();
138    Tick delay = 0;
139
140    if (distRange.contains(addr)) {
141        const Addr daddr = addr - distRange.start();
142        panic_if(!distributor, "Distributor is null!");
143        DPRINTF(GIC, "Gicv3::write(): (distributor) context_id %d "
144                "register %#x size %d is_secure_access %d value %#x\n",
145                pkt->req->contextId(), daddr, size, is_secure_access, data);
146        distributor->write(daddr, data, size, is_secure_access);
147        delay = params()->dist_pio_delay;
148    } else if (redistRange.contains(addr)) {
149        Addr daddr = addr - redistRange.start();
150        uint32_t redistributor_id =
151            daddr / Gicv3Redistributor::ADDR_RANGE_SIZE;
152        daddr = daddr % Gicv3Redistributor::ADDR_RANGE_SIZE;
153        panic_if(redistributor_id >= redistributors.size(),
154                 "Invalid redistributor_id!");
155        panic_if(!redistributors[redistributor_id], "Redistributor is null!");
156        DPRINTF(GIC, "Gicv3::write(): (redistributor %d) context_id %d "
157                "register %#x size %d is_secure_access %d value %#x\n",
158                redistributor_id, pkt->req->contextId(), daddr, size,
159                is_secure_access, data);
160        redistributors[redistributor_id]->write(daddr, data, size,
161                                                is_secure_access);
162        delay = params()->redist_pio_delay;
163    } else {
164        panic("Gicv3::write(): unknown address %#x\n", addr);
165    }
166
167    pkt->makeAtomicResponse();
168    return delay;
169}
170
171void
172Gicv3::sendInt(uint32_t int_id)
173{
174    panic_if(int_id < Gicv3::SGI_MAX + Gicv3::PPI_MAX, "Invalid SPI!");
175    panic_if(int_id >= Gicv3::INTID_SECURE, "Invalid SPI!");
176    DPRINTF(Interrupt, "Gicv3::sendInt(): received SPI %d\n", int_id);
177    distributor->sendInt(int_id);
178}
179
180void
181Gicv3::clearInt(uint32_t number)
182{
183    distributor->deassertSPI(number);
184}
185
186void
187Gicv3::sendPPInt(uint32_t int_id, uint32_t cpu)
188{
189    panic_if(cpu >= redistributors.size(), "Invalid cpuID sending PPI!");
190    panic_if(int_id < Gicv3::SGI_MAX, "Invalid PPI!");
191    panic_if(int_id >= Gicv3::SGI_MAX + Gicv3::PPI_MAX, "Invalid PPI!");
192    DPRINTF(Interrupt, "Gicv3::sendPPInt(): received PPI %d cpuTarget %#x\n",
193            int_id, cpu);
194    redistributors[cpu]->sendPPInt(int_id);
195}
196
197void
198Gicv3::clearPPInt(uint32_t num, uint32_t cpu)
199{
200}
201
202void
203Gicv3::postInt(uint32_t cpu, ArmISA::InterruptTypes int_type)
204{
205    platform->intrctrl->post(cpu, int_type, 0);
206}
207
208void
209Gicv3::deassertInt(uint32_t cpu, ArmISA::InterruptTypes int_type)
210{
211    platform->intrctrl->clear(cpu, int_type, 0);
212}
213
214Gicv3Redistributor *
215Gicv3::getRedistributorByAffinity(uint32_t affinity) const
216{
217    for (auto & redistributor : redistributors) {
218        if (redistributor->getAffinity() == affinity) {
219            return redistributor;
220        }
221    }
222
223    return nullptr;
224}
225
226void
227Gicv3::serialize(CheckpointOut & cp) const
228{
229    distributor->serializeSection(cp, "distributor");
230
231    for (uint32_t redistributor_id = 0;
232         redistributor_id < redistributors.size(); redistributor_id++)
233        redistributors[redistributor_id]->serializeSection(cp,
234            csprintf("redistributors.%i", redistributor_id));
235
236    for (uint32_t cpu_interface_id = 0;
237         cpu_interface_id < cpuInterfaces.size(); cpu_interface_id++)
238        cpuInterfaces[cpu_interface_id]->serializeSection(cp,
239            csprintf("cpuInterface.%i", cpu_interface_id));
240}
241
242void
243Gicv3::unserialize(CheckpointIn & cp)
244{
245    getSystem()->setGIC(this);
246
247    distributor->unserializeSection(cp, "distributor");
248
249    for (uint32_t redistributor_id = 0;
250         redistributor_id < redistributors.size(); redistributor_id++)
251        redistributors[redistributor_id]->unserializeSection(cp,
252            csprintf("redistributors.%i", redistributor_id));
253
254    for (uint32_t cpu_interface_id = 0;
255         cpu_interface_id < cpuInterfaces.size(); cpu_interface_id++)
256        cpuInterfaces[cpu_interface_id]->unserializeSection(cp,
257            csprintf("cpuInterface.%i", cpu_interface_id));
258}
259
260Gicv3 *
261Gicv3Params::create()
262{
263    return new Gicv3(this);
264}
265